Samsung ML-4551NR - Page 31

Service Manual
Summary of Product
3-14
Samsung Electronics
3.3.1.4. 88F5281 Internal Block Diagram
Dual Channel
32 bit up to 200 MHz
DDR1/DDR2
SDRAM Controller
Feroceon CPU
32 KB
L1
Dcache
32 KB
L1
Icache
PCI/PCI-X
64-bit
port
Mbus-L to
Mbus
Bridge
Mbus ? Crossbar extension)
64 bit @ 166 MHz
GPPs,
UART x 2,
TWSI,
Flash
PCI-
Express
x 1 port
Gigabit
Ethernet
port
USB 2.0
port
Local bus ? 4 bit up to 200 MHz