Technology functions
3.1 High-speed counters
CPU 1512C-1 PN (6ES7512-1CK00-0AB0)
Manual, 09/2016, A5E35306440-AB
41
Control interface per channel
The following table shows the control interface assignment:
Table 3- 3 Assignment of the control interface
Offset from start
address
Load value (meaning of the value is specified in LD_SLOT_0)
Bytes 4 to 7 Slot 1 Load value (meaning of the value is specified in LD_SLOT_1)
Byte 8 LD_SLOT_0*
Specifies the meaning of the value in Slot 0
Reserve
LD_SLOT_1*
Specifies the meaning of the value in Slot 1
0 0 1 1 Load start value
Reserve
Byte 9
Bit 7: Enable capture function
Bit 6: Enable downward synchronization
Bit 5: Enable upward synchronization
Bit 2: Enable technological function DQ1
Bit 1: Enable technological function DQ0