Skyworks Si5338 - Output Voltage; Output Driver Trim; Output Driver Powerup;Powerdown

Si5338-RM
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Rev. 1.4 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 2021
9.2. Output Voltage
Each of the output drivers can operate from a different VDDO supply. See Register 35 in the Si5338 Data Sheet to
know which supply voltage settings can be used with each output driver format. Register 35 is used to configure
VDDO as 3.3
V, 2.5 V, 1.8 V, or 1.5 V as shown in Figure 12. The actual VDDOx supply voltage needs to agree to
within 10% of the settings in Register 35.
Figure 12. Supply Voltage Programming
9.3. Output Driver Trim
Once the signal types and VDDO of the output drivers have been configured, the outputs must be trimmed using
registers 40-42 as shown in the table in Figure 13.
Figure 13. Setting Output Driver Trim
9.4. Output Driver Powerup/Powerdown
The device allows powering down unused output clocks (CLK
n
) to save on overall power consumption. Register
31[0] controls this function for CLK0, 32[0] controls CLK1, 33[0] controls CLK2, and 34[0] controls CLK3. Setting
the register bit to 0 enables power to the CLK output; setting it to 1 powers it down. The default value is set to 0.
35[7:0]
DRV0_VDDO[1:0]
01234567
DRV1_VDDO[1:0]DRV2_VDDO[1:0]DRV3_VDDO[1:0]
DRVx_VDDO[1:0]
x=0,1,2,3
01
10
11
00
2.5V
Supply Voltage
1.8V
1.5V
3.3V
40[7:0]
01234567
41[7:0]
01234567
42[7:0]
01234567
DRV0_Trim[4:0]DRV1_Trim[4:0]DRV2_Trim[4:0]
DRV3_Trim[4:0]
10011
2.5V CMOS
10101
1.8V CMOS
DRVx_Trim[4:0]
x=0,1,2,3
Driver Type
10111
3.3V CMOS
11111
1.5V HSTL
00100
3.3V SSTL
10111
1.8V SSTL
01111
3.3V LVPECL
01101
2.5V SSTL
00011
3.3V LVDS
00100
2.5V or 1.8V LVDS
10000
2.5V LVPECL
00111
2.5V HCSL
00111
1.8V HCSL
00111
3.3V HCSL
01000
3.3V CML
01001
2.5V CML
001