49
DVP-S9
• MB BOARD IC103 MB91307APFV-G-BND-E1 (SYSTEM CONTROLLER)
Pin No. Pin Name I/O Description
1 to 5 HA17 to HA21 O
Address signal output terminal
6 HA22 —
Not used (open)
7WPO
Write control signal output to the EEPROM (IC101)
8 TRM/XKRCS —
Not used (open)
9 AVCC —
Power supply terminal (+3.3V) (for A/D converter)
10 AVRH —
Reference voltage input (+3.3V) terminal (for A/D converter)
11 AVSS —
Ground terminal (for A/D converter)
12 AN0 I
Mode 0 set input terminal
13 AN1 I
Mode 1 set input terminal
14 AN2 I
Mode 2 set input terminal
15 AN3 I
Mode 3 set input terminal
16 INT0 I
Interrupt request signal input from the AV decoder (IC503)
17 INT1 I
Interrupt request signal input from the ARP (IC302)
18 INT2 I
Interrupt request signal input from the servo DSP (IC302)
19 INT3 I
Interrupt request signal input from the gate array (IC202)
20 INT4 I
Interrupt request signal input from the interface controller (IC401)
21, 22 INT5, INT6 —
Not used (fixed at “H”)
23 INT7 —
Not used (open)
24 VCC —
Power supply terminal (+3.3V)
25 SI0 I
Serial data input from the interface controller (IC401)
26 SO0 O
Serial data output to the interface controller (IC401)
27 SC0 O
Serial clock signal output to the interface controller (IC401)
28 SI1 I
Serial data input terminal Not used (open)
29 SO1 O
Serial data output terminal Not used (open)
30 SC1 O
Serial clock signal output terminal Not used (open)
31 SI2 I
Serial data input terminal (for test)
32 SO2 O
Serial data output terminal (for test)
33 DSENS —
Not used (open)
34 VSS —
Ground terminal
35 XRST O
System reset signal output terminal “L”: reset
36 XARPPST O
Reset signal output to the ARP (IC302) “L”: reset
37
RGBSEL/MICMUTE
—
Not used (open)
38 SDA I/O
Two-way data bus with EEPROM (IC101)
39 SCL O
Serial clock signal output to the EEPROM (IC101)
40 TRM+/XKRRST —
Not used (fixed at “L”)
41
EUROV/Y/CLAPSW1
—
Not used (open)
42
DISCEXT/CLPSW0
—
Not used (open)
43 MD0 I
Mode select 0 signal input terminal (fixed at “H” in this set)
44 MD1 I
Mode select 1 signal input terminal (fixed at “L” in this set)
45 MD2 I
Mode select 2 signal input terminal (fixed at “L” in this set)
46 DREQ0 I
Request 0 signal input from the AV decoder (IC503)
47 DACK0 O Acknowledge 0 signal output to the AV decoder (IC503)
48 XDRVMUTE O
Drive mute signal output terminal
49 DREQ1 I
Request 1 signal input from the AV decoder (IC503)
50 DACK1 O
Acknowledge 1 signal output to the AV decoder (IC503)
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