Sony HCD-RX55 - IC Block Diagrams

HCD-GRX3/RX
— 19 — — 20 — — 21 — — 22 — — 23 —
IC01 (CD DECORD BOARD) CXA1782BQ IC101 (MAIN BOARD) LA1186
IC301 (MAIN BOARD) LC75392
IC201 (MAIN BOARD) TA8189N
IC02 (CD DECORD BOARD) TC9173P
5-3. IC BLOCK DIAGRAMS
IC03 (CD DECORD BOARD) BA5941FP
IC602 (PANEL BOARD) BU2092
+
–
LEVEL SHIFT
+
–
+
–
1 2
3
4
5
6
7
8
9
10
11
12 13
14
28
27
LEVEL SHIFT
+
–
+
–
MUTE
+
–
+
–
LEVEL SHIFT
+
–
+
–
LEVEL SHIFT
+
–
+
–
+
–
15
1617
18
19
21 20
22
26
25
24
23
+
–
NC
Vcc
VccVcc
VCC
BIAS IN
IN1B IN1A IN2B IN2A
GND GND
MUTE
VCC
OUT2A OUT2B OUT1A OUT1B
IN4B IN4A IN3B IN3A OP OUT OP IN (–) OP IN (+) GND NC VCC OUT3A OUT3B OUT4A OUT4B
DRIVER
DRIVER
GND
MUTE
CONTROL
XRST
T.T(M)
POSI.1
POSI.2
T.T.SW
VDD
STB
CLOK
DATA I
DATA 0
LOADING
M-
LOADING
M+
SENSOR
1
8
2
3
4
5
6
7
16
9
15
T
C
14
13
12
11
10
SERIAL I/O
CONTROL
LATCH
LATCHLATCH
36
PHD2 PHD1 PHD
33
LD
32
RF M
31
RF O
30
RF I
29
CP
28
CB
27
CC1
26
CC2
25
FOK
24 SENS
23 C. OUT
22 XRST
21 DATA
20 XLT
19 CLK
18 VCC
17 ISET
16 SL 0
15 SL M
14 SL P
13
12
TA O
TA M
11
FSET
10
TG2
9
TGU
8
SRCH
7
FE M
6
FE O
5
FLB
4
FGD
3
FDFCT
2
FEI
1
FEO
48VC
47TDFCT
46TZC
45ATSC
44TEI
43LPFI
42TEO
41VEE
40EI
39E
38F
37FE BIAS
+
+
–
+
+
–
+
–
+
–
+
–
+
–
+
–
+
+
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
–
+
+
–
–
+
+
–
+
–
+
–
+
–
+
–
APC
–
–
–
–
LEVELS
FOK
MIRR
DFCT
RF IV AMP2
RF IV AMP1
FE AMP
F IV AMP
E IV AMP
TE AMP
FZC COMP
BAL1 BAL2 BAL3
TOG1 TOG2 TOG3
TTL
IIL
IIL
TTL
TTL
IIL
• IIL DATA RESISTOR • INPUT SHIFT RESISTOR
• ADDRESS DECODER
• OUTPUT DECODER
HPF COMP LPF COMP
TZC COMP
DFCT
DFCT
TM1
FS4
ATSC
• WINDOW COMP
• FCS PHASE
COMPENSATION
• TRACKING
• PHASE
COMPENSATION
• ISET
FS1
FS2
TM4
TM5
TM6
TM3
TM7
TG2
• F SET
TG1
TM2
+
–
TOG1-3 FS1-4 TG1-2 TM1-7 PS1-4
BAL1-3
35 34
+
–
3
6
9
12
15
2
5
8
11
14
1
4
7
10
13
28
25
22
19
16
29
26
23
20
17
30
27
24
21
18
+
–
+
–
+
–
LATCH
DECODER
CONTROL
SHIFT
REGISTER
–
+
LVROUT
LVRIN
LTOUT
LTCOM
LT4
LT3
LT2
LT1
L4
L3
L2
L1
VDD
CL
DI
RVROUT
RVRIN
RTOUT
RTCOM
RT4
RT3
RT2
RT1
R4
R3
R2
R1
VREF
VSS
CE
RF IN
1
2
3
4
5
6
7
8
9
BYPAS
GND
GND
MIX IN
IF
OSC
VCC
AFC
RF
VREF
MIX
REG
OSC BUF
CH2/A CH2/B NF VCC CG NF ALC
METAL
OUT
PRE
OUT
TAPE A
/TAPE B
REC
OUT
REC
IN
CH1/A CH1/B NF GND1 M/H NF
CH2
CH2
ALC
M/N
CH1
GNDGND
CH1
+
–
+
–
+
–
+
–
A/B
GNDMETAL
OUT
PRE
OUT
MIX
OUT
REC
OUT
REC
IN
IREF
VREF2
VREF1
24 23 22 21 20 19 18 17
16
15 14 13
123456789101112
1
2 3
4
5 6 7 8 9
1016 15 14 13 12 11
CONTROL
CIRCUIT
12 BIT
SHIFT
REGISTER
12 BIT
STORAGE
REGISTER
OUTPUT
BUFFER
(OPEN DRAIN)
1718
VDD OE Q11 Q10 Q9 Q8 Q7 Q6 Q5
Q4 Q3 Q2 Q1 Q0
LCK
CLOCK
DATA
VSS
3
6
9
12
15
18
2
5
8
11
14
17
1
4
7
10
13
16
SHIFT
REGISTER
LATCH
ENABLE
SIN
CK
LATCH
SOUT
EN
RST
GND
GND
VDD
O1
O2
O3
O4
O5
O6
O7
O8
GND
IC603 (PANEL BOARD) BU2114