Sony MC-S50 - Page 23

23
MC-S50
Pin No. Pin Name I/O
Description
51 HINT
O Interrupt request signal output terminal Not used (open)
52 CVDD —
Power supply terminal (+1.5V)
53 BFSX0 O
LR frame signal output to the D/A converter (IC302)
54 BFSX2 O
Chip select signal output to the EEPROM (IC603)
55 HRDY
O Ready signal output terminal Not used (open)
56 DVDD —
Power supply terminal (+3.2V)
57 DVSS
— Ground terminal
58 HD0
O Enable signal output to the flash ROM (IC602)
59 BDX0
O Serial data transmit signal output to the D/A converter (IC302)
60 BDX2
O Serial data transmit signal output to the EEPROM (IC603) and CPU (IC801)
61 IACK
O Interrupt request signal output terminal Not used (open)
62 HBIL
— Not used (fixed at “H”)
63 NMI
I Nonmaskable interrupt request signal input terminal Not used (fixed at “H”)
64 INT0
I Interrupt request signal input terminal Not used (fixed at “H”)
65 INT1
I Interrupt request signal input from the CPU (IC801)
66 INT2
I Interrupt request signal input from the USB controller (IC901)
67 INT3
I Interrupt request signal input terminal (connected to pin y; (BDX2))
68 CVDD —
Power supply terminal (+1.5V)
69 HD1
O Enable signal output to the flash ROM (IC602)
70 CVSS
— Ground terminal
71 BCLKX1
O Serial clock signal output to the D/A converter (IC302)
72 DVSS
— Ground terminal
73 BFSX1 O
Serial data receive signal output terminal Not used (fixed at “H”)
74 BDX1
O Serial data transmit signal output terminal Not used (open)
75 DVDD
— Power supply terminal (+3.2V)
76 DVSS
— Ground terminal
77 CLKMD1
I Clock mode signal output terminal Not used (fixed at “L”)
78 CLKMD2
I Clock mode signal output terminal Not used (fixed at “H”)
79 CLKMD3
I Clock mode signal output terminal Not used (fixed at “L”)
80 HPI16
— Not used (fixed at “L”)
81 HD2
O Reset signal output to the USB controller (IC901) “L”: reset
82 TOUT
O Timer signal output terminal Not used (open)
83 EMU0
I Emulator signal input terminal
84 EMU1/OFF
O Emulator signal output terminal
85 TDO
O Test data signal output terminal
86 TDI
I Test data signal input terminal
87 TRST
I Test reset signal input terminal
88 TCK
I Test clock input terminal
89 TMS
I Test mode select signal input terminal
90 CVSS
— Ground terminal
91 CVDD —
Power supply terminal (+1.5V)
92 HPIENA
I HPI module select signal input terminal Not used (fixed at “L”)
93 DVSS
— Ground terminal
94 CLKOUT
O Master clock output terminal Not used (open)
95 HD3
O USB ON/OFF control signal output terminal “L”: ON