4646
MXD-D4
12
7
8
29
15
16
1
94
1
13
1
DIGITAL
INTERFACE
DECIMATION
FILTER
DC-
CANCELLATION
FILTER
A/D
CONVERTER
BLOCK
13
11
CLOCK
CONTROL
CLOCK AND
TIMING CIRCUIT
RESET
SWITCH
Q301
CD/MD
SELECTOR
IC307
IEC 958
DECODER
DATA
IN/OUT
INTERFACE
D/A
CONVERTER
BLOCK
AUDIO FEATURE
PROCESSOR
INTERPOLATOR
NOISE SHAPER
21 33 37 12
MUTING
Q300
J300
L
IN
OUT
ANALOG
R
L
R
LINE
AMP
IC305
LINE
AMP
IC100 (1/2),
IC200 (1/2)
LOW-PASS
FILTER
IC100 (2/2),
IC200 (2/2)
HEADPHONE
AMP
IC304
MUTING
Q100, 200
PHONE
LEVEL
PHONES
J301
2 6 7 3 11 19 25 42 43 45 100 123 9 10 116 827 24
MUTING
Q101, 201
26
69
D302 D300
D303
RV301
75
77
74
73
37
62
MOTOR
DRIVE
MM
M702
(LOADING)
LOADING MOTOR DRIVE
IC401
OUT1
OUT2
IN1
IN2
CD MECHANISM CONTROLLER
IC800 (1/2)
3
95
30
37
13
29
4
36
SDA (IIC)
CLK (IIC)
15
26
X800
16MHz
122 – 119, 113 – 102
D0 – D15
DQ0 – DQ15
A1 – A19
A0 – A18
A0 – 18
100 – 94, 92, 85 – 77, 75, 73
25 – 18, 8 – 1, 48, 17, 16
29, 31, 33, 35, 38, 40, 42, 44,
30, 32, 34, 36, 39, 41, 43, 45
26
63
28
65
11
90 20
14
22
19RESET
117
X801
10MHz
RESET
SWITCH
Q501
E
D
(Page 47)
(Page 47)
PDOWN
RESET
A
(Page 45)
B
(Page 45)
C
(Page 45)
F
(Page 45)
ADDT
DOUT
DIN0
LRCK, BCK
CD BLOCK
(BU-21BD53)
OP ASSY (A-MAX. 2)
CD DATA
CD CLK
SQ DATA
SQ CLK
XLT
SENS
SCOR
LDON
1 – 4
1 – 2
SPNDL MUTE
XRST
DOUT
DATA
CLK
SUBQ
SQCK
XLT
SENS
SCOR
LDON
1 – 4
1 – 2
SPNDL MUTE
XRST
DAC MUTE
LINE MUTE
OUT SW
IN SW
LOAD NEG
LOAD POS
LEVEL L
LEVEL R
LVL L
LVL R
IIC DATA
XOUT
XIN
IICCLK
MD RST
SPDIF MUTE
RESET (AD/DA)
SLICER SEL
SPDIF LOCK
DAC MUTE
PDOWN
LINE MUTE
CS0
OE
WE
WP
XOUT
XIN
CE
OE
WE
WP
SYSTEM CONTROLLER
(MD MECHANISM CONTROLLER)
IC801 (2/2)
FLASH MEMORY
IC802
WS
PWON
SCLK
CLKOUT
SPDIFO
SPDIFI
RESET
SLICER
SEL
DATAO
BCK
LRCK
BCK
LRCK, BCK
3
22
18
VOUTR
VOUTL
05
VINL
VINR
• SIGNAL PATH
: CD PLAY
: MD PLAY (ANALOG OUT)
: MD REC (ANALOG IN)
A/D CONVERTER
IC301
D/A CONVERTER
IC300
LOCK
IISOUTBCK
IISOUTWS
BCK
LRCK
MUTE
–1
–2
S1
(IN/OUT)
OUT
IN
ON: When tray is
open/close.
MUTING CONTROL
SWITCH
Q302
6-2. BLOCK DIAGRAM – MAIN Section –
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