Sony STR-KM22 - Page 58

STR-KM22/KM55/KM77
58
Pin No. Pin Name I/O Description
71 APLL10 - PLL Analog VCC.
72 XTALVCC33 - PLL Crystal Oscillator Power.
73 XTALOUT O Crystal Clock Output.
74 XTALIN I Crystal Clock Input.
75 XTALGND - PLL Crystal Oscillator Ground.
76 TPVDD10 - Analog Power for TMDS Transmitter Core.
77 TXC– O
HDMI Transmitter TMDS Output Clock Pair. Main HDMI transmitter output port TMDS clock
pair.
78 TXC+ O
HDMI Transmitter TMDS Output Clock Pair. Main HDMI transmitter output port TMDS clock
pair.
79 TX0– O
HDMI Transmitter TMDS Output Data Pairs. Main HDMI transmitter output port TMDS data
pairs.
80 TX0+ O
HDMI Transmitter TMDS Output Data Pairs. Main HDMI transmitter output port TMDS data
pairs.
81 TDVDD10 - Digital Power for TMDS Transmitter Core.
82 TX1– O
HDMI Transmitter TMDS Output Data Pairs. Main HDMI transmitter output port TMDS data
pairs.
83 TX1+ O
HDMI Transmitter TMDS Output Data Pairs. Main HDMI transmitter output port TMDS data
pairs.
84 TX2– O
HDMI Transmitter TMDS Output Data Pairs. Main HDMI transmitter output port TMDS data
pairs.
85 TX2+ O
HDMI Transmitter TMDS Output Data Pairs. Main HDMI transmitter output port TMDS data
pairs.
86 CVDD10 - Digital Core Potential.
87 ARCRX_TX I/O
Audio Return Channel. This pin is used to transmit or receive an IEC60958-1 audio stream.
In ARC transmitter mode, received on the SPDIF_IN input pin, this pin transmits an S/PDIF
signal to an ARC receiver-capable source device (such as HTiB) or a repeater device (such as
AVR), using single-mode ARC.
In ARC receiver mode, transmitted through the SPDIFOUT pin, this pin receives an S/PDIF
signal from an ARC transmitter-capable sink device (such as DTV), using single-mode ARC.
The channel can either be an ARC input or an ARC output at a time.
88 WS0_OUT_DR0_GPIO7 O I2S Word Select Output / DSD Data Right Bit 0.
89 SCK0_DCK O I2S Serial Clock Output / DSD Clock Output.
90 SD0_0_DL0 O I2S Serial Data 0 Output / DSD Data Left Bit 0 Output.
91 MCLK O Master Clock Output.
92 SD0_1_DR1_GPIO1 O I2S Serial Data 1 Output / DSD Data Right Bit 1 Output / Programmable GPIO 1.
93 SD0_2_DL1_GPIO2 O I2S Serial Data 2 Output / DSD Data Left Bit 1 Output / Programmable GPIO 2.
94 SD0_3_DR2_GPIO3 O I2S Serial Data 3 Output / DSD Data Right Bit 2 / Programmable GPIO 3.
95 MUTEOUT/GPIO4 I/O Mute Audio Output / Programmable GPIO 4.
96 SPDIFOUT_DL2 O S/PDIF Output / DSD Data Left Bit 2.
97 IOVCC33 - I/O VCC.
98 SDO_GPIO10 I/O SPI Slave Data Output / Master Data Input / Programmable GPIO 10.
99 SDI/GPIO11 I/O SPI Slave Data Input / Master Data Output / Programmable GPIO 11.
100 SS_GPIO8 I/O SPI Slave Select / Programmable GPIO 8.