DocID029937 Rev 2 7/22
AN4943 LCD-TFT display on FSMC
21
The Chrom-ART Accelerator™ (DMA2D) can update the whole image on the display (full
refresh) or only a part of it (partial refresh).
The configuration of the Chrom-ART Accelerator™ (DMA2D) (full or partial refresh) is done
by programming specific registers through the high level HAL library function as shown in
Section 4: Chrom-ART Accelerator™ (DMA2D) configuration in STM32CubeL4.
3 LCD-TFT display on FSMC
3.1 Hardware interface description
The below signals are used to connect the Flexible Static Memory interface (FSMC) to the
LCD-TFT display:
Table 2. FSMC signals
Signal name FSMC I/O Function
A[25:0] O Address bus
D[15:0] I/O Bidirectional data bus
NE[x] O Chip select, x=1..4
NOE O Output enable
NWE O Write enable
Table 3. LCD-TFT signals
Signal name
(1)
1. The signal names are provided according the Type B Display Bus Interface (DBI) as described in the MIPI
Alliance standard for display bus interface.
LCD-TFT I/O Function
D/CX I Data/command control signal
D[15:0] I/O Bidirectional information signals bus
CSX I Chip select control signal
RDX I Read control signal
WRX I Write control signal
TE O Tearing effect
RESX I Reset
To Next Page
Loading...
Need help?
General
