The MSI clock can also be used as a backup clock source (auxiliary clock) if the HSE crystal oscillator fails (see
section' Clock security system (CSS)' in the reference manual).
The MSI oscillator provides a low-cost (no external components) low-power clock source. In addition, when used
in PLL‑mode with the LSE, the MSI provides a very accurate clock source that can be used by the USB OTG-FS
peripheral, and feeds the PLL to run the system at the maximum speed 160 MHz.
Hardware auto calibration with LSE (PLL-mode)
When a 32.768 kHz external oscillator is present in the application, either MSIS or MSIK can be configured in a
PLL-mode. This mode is enabled as follows:
• for MSIS: by setting the MSIPLLEN bit to 1 in RCC_CR register
• for MSIK: by setting the MSIPLLEN bit to 0 in RCC_CR register
In case MSIS and MSIK ranges are generated from the same MSIRC source, the PLL-mode is applied on both
MSIS and MSIK. When configured in PLL-mode, the MSIS or MSIK automatically calibrates itself thanks to the
LSE. This mode is available for all MSI frequency ranges. At 48 MHz, the MSIK in PLL-mode can be used for the
USB OTG-FS device, avoiding the need of an external high-speed crystal.
For more details on how to measure the MSI frequency variation, refer to section Internal/external clock
measurement with TIM15/TIM16/TIM17 in the reference manual.
4.4 LSE clock
The LSE crystal is a 32.768 kHz low-speed external crystal or ceramic resonator (see Table 3). It provides a
low-power but highly-accurate clock source to the RTC (real-time clock) peripheral for clock/calendar or other
timing functions.
The crystal oscillator driving strength can be changed at runtime using the LSEDRV[1:0] bits in the RCC_BDCR
register, to obtain the best compromise between robustness and short start-up time on one side and low-power-
consumption on the other side.
External source (LSE bypass)
In this mode, an external clock source must be provided, with a frequency up to 1 MHz. The external clock signal
(square, sinus or triangle) with ~50 % duty cycle, must drive the OSC32_IN pin while the OSC32_OUT pin can be
used as GPIO (see Table 3).
AN5373
LSE clock
AN5373 - Rev 1
page 19/37
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