25
CIRCUIT DESCRIPTION
Introduction
Schematics for the PS300 series supplies are shown
on the following pages. They include the
following: Voltage Control (page 1/11), Low
voltage pre-regulator and high frequency inverter
(page 2/11), Limits and Trip Circuitry (page 3/11),
A/D and D/A (page 4/11), the Microprocessor
(page 5/11), GPIB and Front Panel Control (page
6/11), Low Voltage Power Supplies (page 7/11),
Front Panel (page 8/11), and the High Voltage
Sections (page 9/11 through 11/11).
Most of the components are located on the main
circuit board. The front panel and high voltage
section are located on separate boards. In addition,
the high voltage board is covered with an acrylic
coating and enclosed in a protective box.
Voltage Control
(page 1/11)
Since the output is transformer coupled, only the
magnitude can be set by the primary side control
circuitry. The polarity must be set in the high
voltage section by a multi-pole switch. However,
the sensed voltage and current vary with polarity
and must be converted to a unipolar signal before
they can be used to control the output. To minimize
the effects of noise, the sensed voltage and current
are converted to a -8.26 to +8.26 V range (-8.26 V
corresponding to 0 volts out, +8.26 to full scale).
This allows 13 bits of resolution from the D/A over
±10 V with a relatively large bit size of 2.5 mV.
The sensed voltage, V SENSE (coming from a
resistive divider in the high voltage section) is
buffered by a high input impedance differential
amplifier made up of U109A, U109B and U101D.
This provides a 0 to +8.26 V signal. Next the
polarity is set (for positive or negative output
voltages) with a programmable low offset inverter
(U102, U104A and U104B) and then scaled to
±8.26 V. Next, the voltage is compared to the
programmed voltage with U101B. This signal is
then frequency compensated (U108, U101C, and
related R's and C's) to provide an error voltage, V
ERR. D104 and D107 keep the large capacitors in
the frequency compensation circuitry from
saturating.
The sensed current is first amplified by U105 from
0 - 250 mV to 0 to +8.26 V. Next, the polarity is
set by the programmable inverter of U104C,
U104D and U106. It is scaled to ±8.26 V by
U107C. Then it is compared and frequency
compensated at U107B, to provide I ERR.
D102 acts as a crossover between the two error
signals to determine which one sets V DRIVE, the
control for the output voltage. If I ERR is higher
than V ERR (voltage control mode), then V ERR
controls V DRIVE. However if I ERR is lower
(supply is in current limit), it can pull down V
DRIVE(through D102) to the appropriate level,
since V ERR is isolated by R110.
Diodes D105 and D106 act to keep op amps
U101C and U107B out of saturation during large
load changes. This improves transient response.
Low Voltage Pre-Regulator and HIgh
Frequency Inverter
(page 2/11)
High voltage is made with a high frequency DC to
DC converter. It operates by driving the common
tap of a step-up transformer used as an inverter,
from 0 to 35 volts DC. This makes high voltage by
a combination of transformation and voltage
multiplication. Control is achieved by regulating
the common tap.
Pre-Regulator
The common voltage is made by a combination
step down pre-regulator followed by a
programmable linear regulator. Q203, D203, L201
and C203 form the step down regulator and U205
is the linear regulator.
U206, an LM311 comparator, senses the voltage
across U205. If it is less than 2.5 volts (determined
by D204, a 2.5 volt reference), its output goes
negative. This turns on Q203, allowing current to
flow through L201 onto C203, raising the voltage
at the input of U205. Once the voltage across U205
is greater than 2.5 volts (plus a small amount of
hysteresis set by R219 and C205), U206 shuts off
Q203. Current continues to flow through L201
during the off time since current can't change
instantly through an inductor. This causes the
voltage at pin 2 of Q203 to flyback negatively and
be clamped by D203. The voltage across U205 will
now decay until it is less than 2.5 volts, which
begins the cycle again.
To Next Page
Loading...