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Struck SIS3153 - VME Master;System Controller; Multi Master Operation; System Controller; Bus Grant and Bus Mastership

Struck SIS3153
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SIS Documentation
SIS3153
VME interface
Page 31 of 38
8 VME master/system controller
8.1 Multi master operation
VME is a multi master system, what allows you to use several SIS3153 modules or a mixture
of SIS31xx VME interfaces and other VME master hardware in one crate. The sections below
have to be taken into account for successful multi master operation.
8.1.1 System Controller
The SIS3153 can act as VME system controller. The 16 MHz VME system clock is generated
by the SMD oscillator U10. and enabled/disabled by switch 5 of switch array SW162.
Make sure not to have more than one system controller on the VME backplane. The system
controller has to be the leftmost master in the crate (typically it will reside in slot 1). In the
case of the SIS3153 the system controller is enabled/disabled with switch 5 of SW162.
SIS3153 system controller functionality can also be enabled/disabled via the “USB VME
Master control register. The system controller on/off status is an OR of the control register
setting and the jumper and can be read back from the status register. The factory default is
system controller enabled (as most SIS3153 cards are used in a single master environment.
Note: A VME diagnosis module like the VDIS or a measurement with a VME bus extender
can be used to check, whether a particular CPU or interface generates system clock (with all
other interfaces/CPUs unplugged from the VME backplane. Some VME slave modules may
use the system clock to initialize on board resources, this mechanism may fail if the system
clock is generated by more than one board in the crate. The system clock can also be activated
by software if the switch is in off position. In this case the user has to be aware, that no
SYSCLOCK will be generated during the power up phase of the crate. A SYSRESET may be
required by certain VME slaves for proper initialization of on board circuitry after SIS3153
SYSCLOCK generation was enabled.
8.1.2 Bus grant/bus mastership
make sure to set the jumpers on the bus grant (BG) daisy chain properly unless your crate
has an automatic daisy chain backplane (refer to the VME specification).
Make sure, that no VME master locks bus mastership. It may be a good idea to use release
when done instead of release on request where possible. It may be necessary to use a
higher arbitration timeout than the standard value of 1 ms (selected via the USB VME
Master control register).
use different bus request (BR) levels as needed. The bus request level of the SIS3153 is
programmed with the USB VME Master control register. The BR level of the SIS3153
defaults to 3 (highest level)