Supermicro SUPERSERVER 2028TP-HC0R - Page 104

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SUPERSERVER 2028TP-HC0R/HC0TR/HC0FR USER'S MANUAL
Chipset Conguration
Warning! 
setting may cause the system to become malfunction.
North Bridge

IIO Conguration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are Dis-
able and Enable.
IIO1 Conguration
IOU2 (II0 PCIe Port 1)

by the user. The options are x4x4, x8, and Auto.
IOU0 (II0 PCIe Port 2)

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (II0 PCIe Port 3)

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IIO2 Conguration
IOU2 (II0 PCIe Port 1)

by the user. The options are x4x4, x8, and Auto.
PORT 1A Link Speed

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and Gen 3 (Generation 3) (8 GT/s).