EasyManua.ls Logo

Supermicro X10SLM+-F - SGPIO, TPM;Port 80 Headers

Supermicro X10SLM+-F
115 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
2-28
X10SLM+/X10SLL+ Motherboard Series User's Manual
LE6
DIMM2
DIMM3
DIMM1
DIMM4
FAN2
FAN3
FAN4
FAN1
FANA
JBR1
JLED1
JWD1
JPG1
JPL3
JPL4
JPME1
JPME2
JPL2
JPL1
J19 - RESERVED
LE3
LE5
LE4
J8
JPW1
JPW2
J21
JI2C1
JI2C2
JL1
J31
J32
JS1
JS2
JS3
JUSB1
JPI2C1
JTPM1
U7
J12
J11
T-SGPIO1
T-SGPIO2
JSD1
JSTBY1
B1
JBT1
JF1
J14
SW1
MH8
MH7
MH1
MH6
MH5
NMI
X
JTPM1:TPM/PORT80
JBR1:BIOS RECOVERY
1-2:NORMAL
2-3:BIOS RECOVERY
1-2:ENABLE
JPUSB1:USB4/5 WAKE UP
2-3:DISABLE
LAN4
LAN3
1-2:ENABLE
JPL2:LAN2
2-3:DISABLE
2-3:DISABLE
JPL4:LAN4
1-2:ENABLE
JPME2
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2-3:ME RECOVERY
JPME1
1-2:NORMAL
COM2
USB1(3.0)
FF
1-2:RST
2-3:NMI
JWD1:WATCH DOG
USB8/9
USB12/13
JSD1:SATA DOM POWER
_LAN
IPMI
1-2:ENABLE
2-3:DISABLE
JPL3:LAN3
JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPI2C1:PWR I2C
VGA
COM1
USB0(3.0)
JBT1:CMOS CLEAR
LAN2
JL1
LAN1
DIMMB2
DIMMA2
JI2C1/JI2C2
USB4/5
CPU SLOT6 PCI-E 3.0 X8/16
2-3:DISABLE
1-2:ENABLE
CPU
OFF:DISABLE
ON:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED
LED
PWR
HDD
NIC1
NIC2
OH/
X
RST
PWR
USB2/3(3.0)
I-SATA3
I-SATA4
I-SATA1
I-SATA0
I-SATA5
CPU SLOT5 PCI-E 3.0 X8
PCH SLOT4 PCI-E 2.0 X2/4(INX8)
DIMMB1
DIMMA1
JPG1: VGA
J18 - RESERVED
I-SATA2
SP1
C
A.T-SGPIO 1
B.T-SGPIO 2
C.JTPM1
A
B
T-SGPIO 1/2 Headers
The Serial General Purpose Input/
Output (SGPIO) is a bus used be-
tween the hard drive controller and
a backplane. There are two T-SGPIO
headers on this motherboard. See the
table on the right for pin denitions.
T-SGPIO
Pin Denitions
Pin# Denition Pin Denition
1 NC 2 NC
3 Ground 4 Data
5 Load 6 Ground
7 Clock 8 NC
TPM Header/Port 80 Header
A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin deni-
tions.
TPM/Port 80 Header
Pin Denitions
Pin # Denition Pin # Denition
1 LCLK 2 GND
3 LFRAME# 4 <(KEY)>
5 LRESET# 6 +5V (X)
7 LAD 3 8 LAD 2
9 +3.3V 10 LAD1
11 LAD0 12 GND
13 SMB_CLK4 14 SMB_DAT4
15 +3V_DUAL 16 SERIRQ
17 GND 18 CLKRUN# (X)
19 LPCPD# 20 LDRQ# (X)

Table of Contents