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Supermicro X10SLM+-F - PCI-E and DMI Link Power Management; Memory Configuration

Supermicro X10SLM+-F
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4-12
X10SLM+/X10SLL+ Motherboard Series User's Manual
Disabled, the PCI-E ASPM will be programmed before OpROM. The options are
Enabled and Disabled.
CPU SLOT6 PCI-E 3.0 x8/x16 ASPM/CPU SLOT5 PCI-E 3.0 x8 ASPM
This feature congures the ASPM (Active State Power Management) settings
for the PCI-E device installed on CPU SLOT6 or CPU SLOT5. The options are
Disabled, Auto, ASPM L0s, ASPM L1, and ASPM L0sL1.
DMI Link ASPM Control
This feature congures the ASPM (Active State Power Management) settings for
the DMI link. The options are Disabled, L0s, L1, and L0sL1.
PCH DMI Link ASPM Control
This feature congures the ASPM (Active State Power Management) settings for
the DMI link on the PCH chip. The options are Disabled and Enabled.
PCH SLOT4 PCI-E 2.0 x2/4 (x8) ASPM
This feature congures the ASPM (Active State Power Management) settings
for the PCI-E device installed on PCH SLOT4. The options are Disabled, L0s,
L1, L0sL1, and Auto.
Memory Conguration
This item displays the information on the memory modules installed on the
motherboard.
Memory RC Version
Memory Frequency
Total Memory
Memory Voltage
DIMM A1
DIMM A2
DIMM B1
DIMM B2
CAS Latency (tCL)
Minimum Delay Time

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