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X9DRG-O(T)F-CPU/X9DRG-O-PCIE Platform User’s Manual
X9DRG-O(T)F-CPU Quick Reference
Note 1: See Chapter 2 for detailed information on jumpers, I/O ports and
JF1 front panel connections.
Note 2: " " indicates the location of "Pin 1".
Note 3: Jumpers/LED Indicators not indicated are for testing only.
Note 4: Use only the correct type of onboard CMOS battery as specied
by the manufacturer. Do not install the onboard battery upside down to
avoid possible explosion
SW1
JPW10
J21
SP1
JBT1
JITP0
JSD2
JSD1
JTPM1
I_SATA1
I-SATA0
I-SATA2
I_SATA3
JF1
JWD1
JBR1
JPME1
JPL1
JPG1
J29
JPB1
J30
LE1
LE4
DM1
FAN8
FAN6
FAN7
FAN5
FAN1
FAN3
FAN4
JSPK1
JL1
JOH1
JPLD1
JPW18
JPW17
JPW6
JPW12
JPW4
JPW5
JPW3
JPW13
JPW14
JPW15
JPW16
T-SGPIO2
T-SGPIO1
T-SGPIO-S1
BT1
JPW24
JPW23
JPW22
JPW21
BIOS
LICENSE
10G MAC CODE
10G SAN MAC
1G MAC CODE
IPMI CODE
BAR CODE
P2-DIMME1
P2-DIMME2
P2-DIMME3
P2-DIMMF1
P2-DIMMF2
P2-DIMMF3
USB10/11
USB2/3
CPU1
P1-DIMMC1
P1-DIMMC2
P1-DIMMC3
P1-DIMMD1
P1-DIMMD2
P1-DIMMD3
LAN2
LAN1
CPU2
P1-DIMMB3
P1-DIMMB2
VGA1
P1-DIMMB1
P2-DIMMH3
COM1
P1-DIMMA3
P1-DIMMA2
P2-DIMMH2
P1-DIMMA1
P2-DIMMH1
IPMI_LAN
P2-DIMMG3
USB0/1
P2-DIMMG2
P2-DIMMG1
REV:1.00
X9DRG-OF-CPU
S_SATA1
FAN2
JPW7
I_SATA4
I_SATA5
S_SATA2
S_SATA2
S_SATA3
JPME2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
USB8/9
PCH
BIOS
LAN
CTRL
BMC
BMC Firmware
CLK Chip
USB6
J34
J33
J32
J31