112 Appendices TB9100 Reciter Service Manual
© Tait Electronics Limited January 2006
A[24] C11 I/O Address bus 24
A[25] D10 I/O Address bus 25
A[26] C10 I/O Address bus 26
A[27] A13 I/O Address bus 27
A[28] A10 I/O Address bus 28
A[29] A12 I/O Address bus 29
A[30] A11 I/O Address bus 30
A[31] A9 I/O Address bus 31
ALEA
MIITXD1
K2 O/P Address Latch Enable A
MII Transmit Data 1
ALEB
DSCK
AT1
JI I/O Address Latch Enable B
Development Serial Clock
Address Type 1
AS
L3 I/P Address Strobe
BADDR28 M3 O/P Burst Address [28]
BADDR29 M2 O/P Burst Address [29]
BADDR30
REG
K4 O/P Burst Address [30}
Register select
BB
E1 I/O Bus Busy
BDIP
GPL_B5
D2 O/P Burst Data In Progress
General-purpose Line B5
BG
E2 I/O Bus Grant
BI
E3 I/O Burst Inhibit
BR G4 I/O Bus Request
BRGO1
I2CSDA
PB27
E19 I/O BRG1 output clock
I
2
C serial data pin
General-purpose I/O port B, bit 27
BRGO2
I2CSCL
PB26
F19 I/O BRG2 output clock
I
2
C serial clock pin
General-purpose I/O port B, bit 26
BRGO3
PB15
Txclav
R17 I/O BRG3 output clock
General-purpose I/O port B, bit 15
Transmit cell available input signal
BRG04
SPIMOSI
PB28
D19 I/O BRG4 output clock
SPI output data in server mode; SPI input data in client mode
General-purpose I/O port B, bit 28
BS_A0
D8 O/P Byte Select 0 on UPMA
BS_A1
C8 O/P Byte Select 1 on UPMA
BS_A2
A7 O/P Byte Select 2 on UPMA
Table 8.10 MPC859T Port Assignments (Continued)
Pin Name Pin No. Type Function