TB9100 Reciter Service Manual Network Circuitry 65
© Tait Electronics Limited January 2006
8us, to minimize the disruption to MPC memory accesses. The issuing of
refresh cycles is handled automatically by the UPM (see “User-
Programmable Machines” on page 51) using its periodic timer to determine
the refresh interval.
5.4 DSP
5.4.1 DSP
A TMS320VC5510 digital signal processor chip is provided for the vocoder
and other signal processing functions. It is a high-performance 16-bit fixed-
point DSP capable of operating at up to 160 MIPs. Refer to the
TMS320VC5510 data sheet (reference 7) and functional overview
(reference 8) for details of the DSP characteristics. Figure 5.7 shows the
internal architecture of the DSP.
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