TB9100 Reciter Service Manual Digital Circuitry 21
© Tait Electronics Limited January 2006
3 Digital Circuitry
Refer to Figure 3.1 on page 24.
3.1 Digital IF
3.1.1 VHF Reciter
The heart of the digital IF system is the 14-bit analog-to-digital converter
(ADC). This is a high-speed device, with a multi-staged “pipeline”
architecture, which is clocked and outputs samples at 40MSPS
(megasamples per second). The analog IF input of the ADC is a differential
structure, and the output is via a 14-bit parallel bus.
The band-limited 16.9MHz IF signal is sampled by the ADC at 40MSPS.
The sampling process results in images of the input signal appearing at other
frequencies so that the ADC behaves in a similar fashion to a mixer.
The digital output therefore contains the wanted signal and the images,
which can be digitally processed to extract one of the many signals.
The desired IF is at 16.9MHz.
The digital downconverter (DDC) digitally downconverts the 16.9MHz IF
to baseband. This is achieved by digital mixing with a numerically
controlled oscillator (NCO). The mixing process is done using in-phase and
quadrature methods to achieve image rejection, and allows channel filtering
to be applied before the signal is passed to the digital signal processor (DSP)
for demodulation. The digital channel filtering also decimates the sample
rate down to 50kSPS (kilosamples per second) for the DSP.
3.1.2 UHF Reciter
The heart of the digital IF system is the 14-bit analog-to-digital converter
(ADC). This is a high-speed device, with a multi-staged “pipeline”
architecture, which is clocked and outputs samples at 40MSPS
(megasamples per second). The analog IF input of the ADC is a differential
structure, and the output is via a 14-bit parallel bus.
The band-limited 70.1MHz IF signal is sub-sampled by the ADC at
40MSPS. The sub-sampling results in images of the input signal appearing
at other frequencies so that the ADC behaves in a similar fashion to a mixer.
The digital output therefore contains information in the form of images,
which can be digitally processed to extract one of the many signals.
The lowest frequency image for the 70.1MHz IF and 40MHz clock is at
9.9MHz.
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