Theory of Operation—2465B/2467B Service
pot-scanning multiplexers, turn the trigger LED on and off,
and control other hardware via serial control data and the
attenuator strobe. Via register U2310, the processor
con-
trols pot selection, and power down timing.
Front-Panel Switch Scanning
The Front-Panel Switches are arranged in a matrix of
ten rows and five columns. Most of the row-column inter-
sections contain a switch. When a switch is closed, one of
the row lines is connected to one of the column lines
through a diode. Reading of the switches is accomplished
by setting a single row line LO and then checking each of
the five column lines sequentially to determine if a LO is
present (signifying that a switch is closed). After each of
the five columns have been checked, the current row line
is reset HI and the next row line is set LO for the next
column scan cycle. A complete Front-Panel scan consists
of all ten row lines LO in sequence and performing a five-
column scan for each of the rows.
Row lines are set LO when the microprocessor writes a
LO to one of the flip-flops in octal registers U2301 or
U2201.
The row data placed on the buffered Data Bus by
the Microprocessor is clocked into the registers as two,
eight-bit words by clocks from the Address Decode cir-
cuitry (DAC LSB CLK for the lower eight bits and DAC
MSB CLK for the upper eight bits). All eight outputs of
register U2201 and two outputs of U2301 drive the ten
rows of the front-panel switch matrix (the fifth line of the
matrix is not used). Series resistors in the lines limit
current flow and eliminate noise problems associated with
excessive current flow.
While each row is selected, the processor will scan
each of the five column lines. To scan the columns, the
microprocessor enables U2410 by the address decode cir-
cuitry. Data bits applied to the input pins are buffered onto
the Data Bus.
In addition to the front-panel switches, the CAL/NO
CAL jumper (P501) is checked to determine whether the
instrument should be allowed to execute the calibration
routines. The levels on U2410 pin 11 and 12 are read by
scanning two additional columns at power-up. If the
jumper is pulling the CAL bit LO, the operator will be
allowed to use the calibration routines stored in firmware.
If the NO CAL bit is pulled LO, the calibration routines may
not be performed. If the jumper is removed, and neither bit
is pulled LO, the Microprocessor is forced into a special
diagnostic mode (CYCLE) used to record certain operating
failures during long-term testing of the instrument. (See
the "Maintenance" section for an explanation of the
diag-
nostic modes.) Removing P501 or switching it between the
CAL and NO CAL positions will not be recognized by the
Microprocessor until the instrument is powered down and
then turned back on.
The resistors in series with the input lines to U2410 are
current-limiting resistors that protect the CMOS data
buffer from static discharges. The resistors connected
from the input lines to the +5 V supply are pull-up resis-
tors for the front-panel column lines.
Digital-to-Analog Converter (DAC)
DAC U2101 is used to set the various analog refer-
ences in the instrument and is used to determine the set-
tings of the front panel potentiometer. The 12-bit digital
values to be converted are written to octal registers U2301
and U2201 for application to the DAC input pins. The DAC
then outputs two complementary analog currents that are
proportional to the digital input data. (Complementary, in
this case, means that the sum of the two output currents
is always equal to a fixed value.)
The maximum range of the output currents is estab-
lished by a voltage-divider network composed of R2010,
R2012,
R2013, R2014 and R2011 conected to the positive
and negative reference current inputs of the DAC (pins 14
and 15 respectively). A +10-V reference voltage applied to
the DAC through R2013 sets the basic reference current.
Resistor R2011 and R2014 and potentiometer R2010 pro-
vide a means to adjust this current over a small range for
calibration purposes. The nominal reference current is 1
mA, the DAC full-scale output current is 4 mA. The output
currents flow through series resistors R2520 and
R2521,
connected to the +1.36-V reference, and proportional volt-
ages result.
Pot Scanning
The Pot Scanning circuitry, in conjunction with the
DAC,
derives digital values for each of the various front-
panel potentiometers. Scanning of the pots is accom-
plished by data selectors
U2401, U2501,
and
U2601.
Three bits are written to register U2310 and select the pot
to be
read.
The bits are latched in the register and keep
the pot selected until the register is reset. The Micropro-
cessor writes a LO to the inhibit input pin (pin 6) of either
U2401,
U2501 or U2601 via register U2210 to enable the
device. The enabled data selector connects the analog
voltage at the wiper of the selected pot to comparator
U2510.
3a-10
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