Tektronix 7704A - Page 35

Circuit Description -7704A
Service
C H O P
M od e
( h oriz)
Cloc k
U2520
Clock,
Pin
10
V er tical
C h
o pp
i
ng
S ί
g
ηαΙ ,
P i n 1
( V
ertical)
C h op D r ive
P
i n 8
C H O P M o d e
( h o r iz), P i n 6
Ι
FF -3 output
Ho r izo n tal
C h o pp e d
B lan k i n g
Pin 4 o u t pu t
V ertical
C h o pp e d B lan k i n g
f r o m P i n 4 of U 2510
V
ertical
M od e L ogic
τ
ο
J
τ ,
Ι
ι
ι
Ι
Ι
ι
F ig . 2-18 . ( Α ) L ogic d
iagra m for C h o p Counter stage ; ( Β ) Table of
in p ut/out p ut co m b i n atio n s .
T
h e V ertical
M
o
de L ogic stage is m a de up of d iscrete
com p onents
C R 2501-C R 2502, C R 2552-C R 2553, and
Q2553-Q2556
. T h ese com p one n ts develo p t he MF ( M ain
F
rame) C hannel
Switc h Signal (Dis p lay R ig h t) . T h is signal
is connecte d to t
he M ain Interface circuit (vertical p lug-in
com p artments an
d trigger-selection circuitry) an d to t
h e
2- 2 4
C R T d ispla y b la nk e d
V ertical C h o pp ing
Signal
V ertical Interface circuit to
in d icate w h ic h vertical unit is
to be d isplaye d . Wh en t
h
is
out put level is HI, t h e rig h t
vertical unit is d is playe d ; w
h en it is L0, t h e left vertical
unit is d is p layed .
T h e VER TICA L M OD E switc h s h own on d iagram 1
p rovi
d
es control levels to t h is stage . T h is switch p rovi d es α