Tektronix 7704A User Manual

stage as controlle d by t
he MF ( M ain F rame)
C
hannel
Switc h Signal (Dis p lay R ig h
t)
from t h e L ogic Circuit .
R esistors R 2226- R 2227 and
R
2228-
R
2229 establis
h
t
h e
in pu t resistance of t h is stage
an
d
provi
d
e α load for
t
h e left
and rig h t vertical pl
u g-in units . R esistors R 2237- R 2239 and
R
2287-
R
2289 esta
b lis h t he operating levels for t h is stage .
R 2231an d R 2281 set t h e current gain for each channel .
T h is stage is ma de up primarily of integrate d circuit
U 2230, w h ic h is t h e same type as used for t
h
e
Trigger
Selector stages . An in
p
ut/output table for U 2230 is
s h own
in
F
ig . 2-24 . U2230 provi d es α
h ig h-imp e
d ance d
ifferential
in put for t h e signal
from
t
he left vertical unit
at
pins 2 an d
15 and t
h e signal from t he rig h t vertical unit at p ins 7 and
10 . T he ou t p ut signal at p ins 12 an d 13 is α differential
signal, w h ic h is connected to t he V ertical B uffer stage
t h roug h R 2241- R2242 . T h e sum of t he DC current at p ins
12 and 13 is always e q ual to t h e sum of t
h
e DC c
u rrents
at
pins
1, 8, 9, and
16 in all
mo
d es . T h is provi d es
α
constant
DC bias to t he following stage as t h e VER TICA L MOD E
switch is c h ange d .
Wh en t he VER TICA L M OD E switch is set to LEF T, t h e
level at pin 4 is L O . T h is level allows t he signal from t he left
vertical unit to p ass to t h e out put w h ile t h e signal from t h e
rig h t vertical unit is bloc k ed . In t h e R IG H T p osition of t h e
VER TICA L MOD E switch , t h e level at pin 4 is HI . Now,
t h e signal from t he rig h t vertical unit is connecte d to t
h e
ou t p ut, w h ile t h e signal from t
h
e left
vertical unit is
b loc k ed .
Wh en t h e VER TICA L MOD E switch is set to
eit h er A L T
or CHO P , t he MF C hannel Switc h Signal
(Dis
p lay
R ig h
t)
at
p in 4 switc h es b etween t h e
L
O and
HI levels at α rate
determined b y eit h er t he C
h
op
Counter or V ertical Binary
stages (see Logic Circuit d
escription) . T h is action allows t he
signal from t h e left vertical
unit
to be d
isplayed w h en t he
MF C hannel Switc h Signal (Display
R
ig
h
t)
is L O and t he
signal from t h e rig h t vertical unit to be
displayed w h en t he
MF C h annel Switc
h Signal (Display R ig h
t)
is HI . Wh en
ADD vertical
mo
de operation is selecte d , α HI level is
applied to pin 14an d t he level at pin 4 is L O as d etermined
b y t h e V ertical M ode L ogic stage in t h e L ogic
Circuit
.
T h is
allows bot h t
h
e
R ig h
t and
L eft V ertical signals to pass to
t
h
e out put pi
n s .
Now,
t he signal from both vertical units is
alge b raically adde d an d t h e resultant signal d etermines t
h
e
vertical d eflection .
T h e V- N ( V ertical-
H orizontal) In h i b it signal from t h e
Rea d out System t h at is applie d to p in 6 h as
final control
over
t
he output signal from t h is stage . Quiescently, t h is
signal is L O and t h e signal from t h e selecte d vertical u nit
can pass
to
output p ins 12 an d 13 . H owever, w h en t h e
Read out System is rea dy to d is p lay readout information,
t h e level at pin 6 goes ΗΙ . T h is level b loc k s t h e signal from
both vertical units, so t here is no signal out p ut from t h is
stage un d er t h is con d ition .
Φ = H as no effect i n t h is case
F ig . 2-24 . I npu t/out pu t ta b le for V ertical P l u g-1 π Selector .
V ertical
Trace Se p aration
Circuit Description -7704A Service
Input

Output
T h e V ertical
Trace Separation stage d etermines if t h e
A u xiliary
Υ Axis in p ut or V ertical Trace Se p aration in p ut
are adde
d to t h e vertical deflection signal .
T h
ese
inputs
provi d e α variable positioning voltage to
vertically offset
one trace of α d ual-swee
p
d isplay .
T h e A u xiliary Υ Axis
input originates in α d ual time-b
ase u nit in eit h er h orizontal
com p artment . T h e V ertical Trace Separation
in put from
t
h e front panel (see diagram 1) p rovides α
means
to
position
t h e Β -sweep d isplay with respect to t
h
e
Α -sweep d isplay for
A L T or C HO P h orizontal modes .
I ntegrated circuit U 2210 in t
he V ertical Trace Sep ara-
tion stage is t he same type as
use
d
for t he V ertical Plug-In
Selector stage . T h e output of t
h
is stage
at pins 13an d 12 of
U 2210 is connecte d to t he
V ertical B uffer stage t h ro ugh
R 2221 an d R2224 . An inp
u
t/output
table for t he V ertical
Trace Separation stage is s h ow
n
in
F
ig . 2-25 .
As s
h
ow
n by t h e in p ut/output ta b le, t he Auxiliary
Υ
Axis in put is connecte d to t he output in d
epen d ent of t he
H OR IZO N TA L M OD E switch setting .
T h e V ertical Trace
Separation input is connecte d to t
he
output only
w hen t he
MF C h annel Switc
h Signal (Dis p lay Β
)
is HI in t h e A L T or
C
H O P h orizontal mo d es .
T he V - Η In h i b it signal from t
h e R
ea
d out System,
applie d to p in 6,
h
as
final control over t h e out p ut signal
from t h is stage .
Q u
iescently, t
h
is
signal is L O and t he
selecte d
in p
ut
can p ass to t h e output . H owever, w hen t he
R
eadout
System is rea dy to d is p lay readout i n formation,
t
h e level
at
pin 6 goes ΗΙ . T h is level block s t he offset inputs
to t
h
is stage, so
t h ey have no effect on t h e p osition of t he
rea do u t d isplay .
2- 29
ν
L O L O L O L
eft ve r tical sig n al
HI L O L O
R ig h t ve r tical sig n al
L O HI L O B ot
h
(a
dd e d alge br aically)
Φ 4 , HI N
eit h e r
( b
loc k e d b y
R ea
d
o u
t Syste m
)

Tektronix 7704A Specifications

General

Brand	Tektronix
Model	7704A
Category	Test Equipment
Language	English