Tektronix 7704A User Manual

Circ u it
Description -7704A
Service
C hannel Counter
C hannel Counter U3450 is α binary
counter w h ic h
pro duces t h e C hannel Ad d ress Co d
e for
t
he Column
an
d
Row Deco d er stages an d t h e
F
ormat Generator stage
. T h is
code instructs t h ese stages to se q uentially select an d dis p lay
t h e eig h t c h an n els of d ata from t
h
e plug-ins .
Table
2-3
gives
t h e eig h t com b inations of t
h
e C
hannel A
d
d ress Co de and
t h e res u ltant channel selected wit h
each combination .
Single-S hot L oc k out
TA BLE 2-3
C hannel Address Co d e
U3449 ma k es up t he Single-S h ot L oc k out stage . T h is
stage allows α single rea d out frame (eig h t com p lete wor d
s)
to be displayed on t h e CR T, after w h ic h t h e Rea d out
System is loc k e d out, so furt h er rea d out dis p lays are not
p
resente d until t
h
e circuit is
reset
. U 3449C an d U
3449D
are connecte d to form α bistable fli p -flop . F or normal
operation, pin 8 of U 3449C is p ulle d HI t h roug h R 3449 .
T
h is activates U 3449C to result in α L O out put level at p in
10,
ena
b ling t h
e Timer
stage to o perate in t h
e
free-running
manner
d escribe d p
reviously .
T h e output of t h e Single-S h
ot L oc k out stage remains L O
to allow U 3433 to op erate in t he
free-running mode until α
L O is receive d at p in 8 of U 3449C .
Wh en t h is occurs, t he
out put level at pin 10 of U 3449C
d oes not ch ange
imme d iately . H
owever, t h e Readout System
is now
ena
b le d
as far as t he si n gle-s h
ot loc k out function is concerne d . If
t he C h annel Counter h
as not com p lete d word eig h
t
(C
hannel 1 of Β H
orizontal unit), t he Rea d out System
continues to op erate in t he
normal manner . H owever, w h en
word eig h t is completed, t he p ositive-going E
nd-of-
F
rame
p
ulse is p ro d uce d at pin 11 of U3450 as t he C hannel
2- 4 8
Counter s
h
ifts to t
he
co d
e
necessary to d isplay wor d one .
T h
is
p
ulse
is coupled
to p
in
12
of U 3449D . T h e momentary
ΗΙ
at
p in
12
activates U 3449D and its output goes L O to
disable
U 3449C ( p in 8 alrea d y LO)
.
T he output of U 3449C
goes HI
to d isable t h e Timer, so it op erates in t h e
Dis p
lay-S
k i p mode . T h e ΗΙ at p in 10 of U 3449C also h ol d s
U 3449D enable d , so it maintains control of t h e fli p -flo p .
T he Single-S hot L oc k out stage remains in t h is con d ition
until α p ositive-going trigger p ulse is a pp lie d to pin 8 of
U 3449C .
T h
is trigger p ulse p ro duces α L O at p in 10 of
U 3449C to ena b le U 3433 an d disa b le U 3449D . Now, the
Timer can operate in t h e normal manner for anot h er
com p lete frame . Wh en wor d eig h t is com p leted, t h e
C h annel Counter p roduces anot h er E nd -of- F rame pulse to
again loc k out t he Timer stage . ( For furt h er information on
t h e Rea d out M od e, see t h e Outp ut Signals description
.)
E nco d ing t he Data
Data
is conveye d from t h e plug-in units to t h e Rea dout
System in t he form of an analog (current level) co de . T h e
ch aracters t h at can be selected by t
h
e encoded d ata are
s h own on t he C
h
aracter Selection
M
atrix (see
F
ig . 2-33) .
Eac h c h aracter re q uires two currents
to d
efine
it ; t
h ese
currents are identified as t h e column current and t he row
current, corres p on d ing to t h e column an d row of t h e
matrix
. T
h e column an d row d ata is enco d e d by
p rogramming
t
he p lug-in units . F igure 2-40 s h
ows α typical
enco d ing sc h
eme using
resistors
for α voltage-sensing
am p lifier plug-in unit .
N
otice t
h
at t
h e
10
time-slot (TS)
p ulses p ro d
uce
d by t
h e Time-Slot Counter stage are
connecte d
to
t h e p lug-in unit . H owever, time-slots 5, 6, 7,
and 10 are not used by t h e p lug-in unit to enco d e d ata
w hen using t he Stan d ar d Rea d out F ormat (see Table 2-2
for Stan d ar d Rea d out F ormat)
.
T he amplitu d e of t h e
time-slot p ulses is exactly -15 volts as determine d by t h e
Timer stage . T h erefore, t h e resultant output current from
t he plug-in units can be accurately controlled by t h e
p rogramming resistors in t h e p l u g-in units .
F
or
example, in F ig .
2-40 resistors R10 t h roug h R90
control t he row
analog
d ata, w h ic h is connected
back to t
h e
Rea d out System .
F
igure 2-41 Α
s
h
ows
an
i
d
ealized out
p
ut
current waveform
of
row
analog data, w
h
ic
h
results from
t h e time-slot p u lses . Each
of
t he row levels
of current
s h own in t hese waveforms corres
p onds to 100
microam p eres of current . T h e row numbers
on t
he
left- h an d si d e of t h e waveform correspond to t h e rows in
t he C h aracter Selection M atrix (see F ig . 2-33) . T h e row
analog d ata is connecte d bac k to t he Rea d out System via
terminal Β 37 of t h e plug-in interface .
T he Column analog d ata is d efine d by resistors R110
t h roug h R 190 . T h e p rogram resistors are connecte d to t h e
time-slot lines by switch closures to encode t h e d esire d
d ata . T h e d ata as encoded by t h e circuit s h own in F ig . 2-40
P in 11 P in 8
P i
n 9
C h annel
U 3450 U
3450 U 3450 Disp laye d
Channel2
L O L O L O
L eft V ertical
Channel 1
L O L O HI
L eft
V
ertical
Channel2
L O Hl L O
Righ t V ertical
Channel l
L O HI HI
Rig h t V ertical
Channel2
HI L O L O
Α H orizontal
Channel
l
Η Ι L O Η Ι
Α H orizontal
Channel2
HI HI
L O
Β H orizontal
Channel
l
HI Hl
HI
Β H orizontal

Tektronix 7704A Specifications

General

Brand	Tektronix
Model	7704A
Category	Test Equipment
Language	English