Tektronix 7834 User Manual

Theory of Operation--7834
In condition 1 above, the positive-going
Storage Lockout
signal is inverted by 0382 to reset
the
Storage
Sweep Gate
Latch . This reset can occur at
any time with any setting of
the
HORIZONTAL MODE switch .
In condition 2 the positive-going Horizontal
Logic Holdoff
signal occurs at
the beginning
of
each A and B Holdoff
signal . The Alternate
Pulse signal passes through U332C
when
pin 9
is
HI (pin 9 is HI when the HORIZONTAL
MODE switch is set to
A
or
B) . The signal is then inverted
by U332B and applied to
the base of Q328 ; this, in turn,
resets the output of
the Storage Gate Latch to its LO state .
In condition 3 the positive-going
A Holdoff signal is coupled
through 0322 and U334D to
the clock input (pin 3) of
U330A setting pin 5 of
U330A HI
at
the beginning of the
A Holdoff
signal . Likewise, the positive-going B Holdoff
signal sets pin 9 of U330B
HI . When pins 9 and 5 of U330
(A and B) are
HI,
a LO
is applied to pin 4 of U332B . This
LO is inverted by
U332B and applied to the base of Q328 .
The LO on pin
4
is
inverted by U332B and applied to the
base of Q328 to
reset the Storage Sweep Gate Latch output
to its LO state .
MAIN INTERFACE
Diagram 3 shows the plug-in interface and the interconnec-
tions between the plug-in compartments, circuit boards,
etc ., of
this instrument . Also, the signal and voltage con-
nections of
each interface connector are identified .
3- 1 0
LOGIC
The Logic circuit develops control signals for use in other
circuits within this instrument and the plug-in units installed
in the vertical and horizontal compartments . These control
signals automatically determine the correct
instrument
operation in relation to the
plug-in units installed or select-
ed, plug-in control
settings, and 7834 control settings . A
block diagram of
the Logic circuit is shown in Figure 3-3 .
A schematic of the Logic circuit is
given
on
diagram 4 at
the rear of
this manual .
The circuit description for the Logic circuit is written with
the approach that each of the integrated circuits and
its
associated discrete components compose an
individual stage
as shown by the block diagram (Fig . 3-3) . The
operation of
each stage is discussed, relating the input signals or
levels to
the output, with consideration given to the
various modes
of operation that may affect the stage . A logic diagram is
also provided for each stage . These diagrams are not discus-
sed in detail, but are provided to aid in relating
the function
performed by a given stage to standard logic
techniques . It
should be noted that these
logic diagrams are not an exact
representation of the internal
structure of the integrated
circuit, but are only a
logic diagram of the function per-
formed by the stage .
An input/output table is given, where
applicable, for
use
with
the circuit description and logic
diagram . These input/output
tables document the combina-
tion of input conditions that
are of importance to perform
the described function of an
individual stage .
Horizontal Logic
The Horizontal Logic stage performs three separate
logic
functions : A Sweep Lockout, B Sweep Lockout,
and
Alternate Pulse generation . Most of the logic for
these
functions is contained within the
Horizontal Logic IC,
U4428 . Figure 3-4 identifies
the three individual stages of
U4428 and the input and output terminals associated with
each . Note that some of the input levels are connected
internally
to
more than one of the individual stages .
A SWEEP LOCKOUT STAGE . The A Sweep
Lockout
Stage produces an output level at the collector of
04462
that determines if the A HOR IZ time-base unit can
produce
a sweep . If this output is HI, the A HORIZ unit
is locked
out (disabled) so it cannot produce a sweep . If the
level is
LO, the A HORIZ unit is enabled and can produce a
sweep
when triggered .
As shown by the logic diagram and input/output
table of
Figure 3-5, only two combinations of input conditions to
U4428 produce an A Sweep Lockout level
(HI) .
The first combination disables the A sweep while
the B
sweep is being displayed with the
HORIZONTAL MODE
switch in ALT position (both time-base
units must be in
sweep mode), if non-delayed
operation is being used . - The
second combination disables
the A sweep during delayed-
sweep operation so that
the B sweep can complete its hold-
off before
the next A sweep begins . If neither of these
conditions occurs, the A Sweep Lockout level is determined
by the Storage Lockout signal . (This signal originates in the
circuitry on diagram 18
.)
Figure 3-5a shows the Storage
Lockout signal connected to the output of the A Sweep
Lockout stage through a phantom-OR gate . (A phantom-OR
gate performs the OR-logic function merely by inter-
connection of two or more signal lines .)
B SWEEP LOCKOUT
STAGE . The B Sweep Lockout stage
produces an output level at
the collector of 04468 that
determines if the B HORIZ time-base
unit can produce a
sweep . A HI output level locks out
(inhibits) the B HORIZ
unit and a LO
level enables the B HORIZ unit to produce
a sweep .

Tektronix 7834 Specifications

General

Brand	Tektronix
Model	7834
Category	Test Equipment
Language	English