Table 5-3 The functional keys of the digital camera demonstration
5.3 C5G_D8M_VIP Demonstration
This demonstration shows how to implement a camera demo in Altera Qsys tool. Altera
VIP (Video Image Processing) suite is used to display the image on the HDMI monitor
and the Nios II processor is used to configure the I2C devices. There is a Camera IP
from Terasic in Qsys, which translates the Bayer pattern from camera to the RGB video
steam format, and feeds it to Altera VIP. The other IP developed by Terasic for
auto-focus is used to find the optimized focus settings of user-defined image area.
◼ Function Block Diagram
Figure 5-9 shows the Function block diagram of C5G_D8M_VIP demonstration.