Appendix A
Table A-3. BSL Version 1.40 on F12x
Device F122, F123X
BSL Version 1.40
Cold start 0C00h
BSL vector address
Warm start 0C02h
Chip ID address 0FF0h
Chip ID data F123h
BSL version address 0FFAh
BSL version data 0140h
Mass erase time, nominal (ms) 206.4
Read/write access at 0000h–00FFh Byte
0100h–FFFEh Word
Verification during write (online) For addresses 0200h-FFFEh
Stack pointer initialization Cold start 0220h
Warm start Unchanged
Resources Used by BSL
Transmit pin (TX) P1.1
Receive pin (RX) P2.2
RAM/stack used 0200h–021Fh
Working registers R5–R10
System clock, affected controls BCSCTL1, DCOCTL
Timer_A, affected controls TACTL, TAR, CCTL0, CCR0
mov.b #00h, &BCSCTL2
Preparation for SW call
mov #00h, SR
br &0C00h
Features of the MSP430 Bootstrap Loader18 SLAA089D – December 1999 – Revised August 2006
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