Usage Notes and Known Design Exceptions to Functional Specifications
www.ti.com
16
SPRZ412K–December 2013–Revised February 2020
Submit Documentation Feedback
Copyright © 2013–2020, Texas Instruments Incorporated
TMS320F2837xD Dual-Core MCUs Silicon Revisions C, B, A, 0
Advisory XRS may Toggle During Power Up
Revision(s) Affected 0, A, B
Details During device power up, the XRS pin may toggle high prematurely. After the V
DDIO
and
V
DD
supplies reach the recommended operation conditions, the XRS pin behavior will be
per the pin description. This is only an issue with the external state of the XRS pin.
Internally, the device will be held in reset by the POR logic until the supplies are within
an acceptable range and XRS is high.
Workaround(s) Disregard XRS activity on the board prior to supplies reaching recommended operating
conditions.
Advisory USB: USB DMA Event Triggers are not Supported
Revision(s) Affected 0, A, B, C
Details The USB module generates inadvertent extra DMA requests, causing the FIFO to
overflow (on IN endpoints) or underflow (on OUT endpoints). This causes invalid IN
DATA packets (larger than the maximum packet size) and duplicate receive data.
Workaround(s) None
Advisory VREG: VREG Will be Enabled During Power Up Irrespective of VREGENZ
Revision(s) Affected 0, A, B
Details During power up of the 3.3-V V
DDIO
, the internal Voltage Regulator (VREG) will be active
until the 1.2-V V
DD
supply reaches approximately 0.7 V. After this time, the VREGENZ
pin tied to V
DDIO
will disable the internal VREG. This will not impact device operation.
Workaround(s) None
To Next Page
Loading...
Need help?
General
