EasyManuals Logo
Home>Texas Instruments>Motherboard>TPS65982

Texas Instruments TPS65982 User Manual

Texas Instruments TPS65982
117 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #26 background imageLoading...
Page #26 background image
7.19 Input/Output (I/O) Characteristics (continued)
Recommended operating conditions; T
A
= –10 to 85°C unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
UARTRX_VIH High-level input voltage
LDO_3V3 = 3.3 V 2
V
VDDDIO = 1.8 V 1.25
UARTRX_VIL Low-level input voltage
LDO_3V3 = 3.3 V 0.8
V
VDDIO = 1.8 V 0.63
UARTRX_HYS Input hysteresis voltage
LDO_3V3 = 3.3 V 0.2
V
VDDIO = 1.8 V 0.09
UARTTX_VOH GPIO output high voltage
I
O
= –2 mA, LDO_3V3 = 3.3 V 2.9
V
I
O
= –2 mA, VDDIO = 1.8 V 1.35
UARTTX_VOL GPIO output low voltage
I
O
= 2 mA, LDO_3V3 = 3.3 V 0.4
V
I
O
= 2 mA, VDDIO = 1.8 V 0.45
UARTTX_RO Output impedance, TX channel LDO_3V3 = 3.3 V 35 70 115 Ω
UARTTX_TRTF Rise and fall time, TX channel 10%–90%, C
L
= 20 pF 1 40 ns
UART_FMAX Maximum UART baud rate 1.1 Mbps
I2C_IRQ1Z, I2C_IRQ2Z
OD_VOL Low level output voltage IOL = 2 mA 0.4 V
OD_LKG Leakage current Output is Hi-Z, V
IN
= 0 to LDO_3V3 –1 1 μA
SBU
SBU_VIH High-level input voltage LDO_3V3 = 3.3 V 2 V
SBU_VIL Low-level input voltage LDO_3V3 = 3.3 V 0.8 V
SBU_HYS Input hysteresis voltage LDO_3V3 = 3.3 V 0.2 V
(1) DEBUG_CTL1/2 do not have an internal pulldown resistance path.
7.20 I
2
C Slave Characteristics
Recommended operating conditions; T
A
= –10 to 85°C unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SDA and SCL COMMON CHARACTERISTICS
ILEAK Input leakage current Voltage on Pin = LDO_3V3 –3 3 μA
VOL SDA output low voltage
IOL = 3mA, LDO_3V3 = 3.3 V 0.4
V
IOL = 3mA, VDDIO = 1.8 V 0.36
IOL SDA max output low current
VOL = 0.4 V 3
mA
VOL = 0.6 V 6
VIL Input low signal
LDO_3V3 = 3.3 V 0.99
V
VDDIO = 1.8 V 0.54
VIH Input high signal
LDO_3V3 = 3.3 V 2.31
V
VDDIO = 1.8 V 1.26
VHYS Input Hysteresis
LDO_3V3 = 3.3 V 0.17
V
VDDIO = 1.8 V 0.09
TSP I
2
C pulse width suppressed 50 ns
CI Pin Capacitance 10 pF
SDA and SCL STANDARD MODE CHARACTERISTICS
FSCL I
2
C clock frequency 0 100 kHz
THIGH I
2
C clock high time 4 μs
TLOW I
2
C clock low time 4.7 μs
TSUDAT I
2
C serial data setup time 250 ns
THDDAT I
2
C serial data hold time 0 ns
TVDDAT I
2
C Valid data time SCL low to SDA output valid 3.4 μs
TVDACK I
2
C Valid data time of ACK condition
ACK signal from SCL low to SDA (out)
low
3.4 μs
TPS65982
SLVSD02E – MARCH 2015 – REVISED AUGUST 2021
www.ti.com
26 Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TPS65982

Table of Contents

Other manuals for Texas Instruments TPS65982

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Texas Instruments TPS65982 and is the answer not in the manual?

Texas Instruments TPS65982 Specifications

General IconGeneral
BrandTexas Instruments
ModelTPS65982
CategoryMotherboard
LanguageEnglish

Related product manuals