`www.thundercomm.com.
The 96Boards specification calls for a MIPI-DSI to be present on the high-speed expansion connector.
A minimum of one lane is required and up to four lanes can be accommodated on the connector.
C865 DEV KIT implementation supports 2 full 4-lane MIPI-DSI interface that is routed to HS1&HS3.
A DSI switch, FS644, is used to support on board DSI-to-HDMI bridging. DSI switch is controlled via
DIP switch #16, pin4, DIP_HDMI_SWITCH. When set to ON, it will enable DSI0 to HS1 and DSI1
to HS3; when set to OFF, will enable DSI1&2 to LT9611UXC and on board HDMI.
5.1.2 MIPI CSI
The 96Boards specification calls for two MIPI-CSI interfaces to be present on the high-speed
expansion connector. Both interfaces are optional. CSI0 interface can be up to four lanes while CSI1
is up to two lanes.
The current C865 DEV KIT board implementation supports a full 4-lane MIPI-CSI interface on CSI0
and two lanes of MIPI-CSI on CSI3. All MIPI-CSI signals are routed directly to and from the SM8250
processor.
5.1.3 I2C
The 96Boards specification calls for two I2C interfaces to be present on the high-speed expansion
connector. Both interfaces are optional unless a MIPI-CSI interface has been implemented. In this case,
an I2C interface shall be implemented.
The C865 DEV KIT board have two CCI I2C interface, I2C0&I2C1, in HS1.
NOTE: Both interfaces, I2C0 and I2C1 are pull-up to 1.8V via 2.2K resistor in 865SOM.
5.1.4 HSIC
The 96Boards specification calls for an optional MIPI-HSIC interface to be present on the High Speed
Expansion Connector.
The C865 DEV KIT board implementation doesn’t support this optional requirement.
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