Ublox SARA-G450 Series - Page 10

SARA-G450 - System integration manual
UBX-18046432 - R08 System description Page 10 of 143
C1-Public
Function
Pin Name
Pin No
I/O
Description
Remarks
SIM
VSIM
41
O
SIM supply output
VSIM = 1.8 V (typical) or 2.8 V (typical) automatically
generated according to the connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_IO
39
I/O
SIM data
Internal 4.7 k pull-up to VSIM.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_CLK
38
O
SIM clock
3.25 MHz clock output for 1.8 V / 3 V SIM.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_RST
40
O
SIM reset
Reset output for 1.8 V / 3 V SIM.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_DET
42
I
SIM detection
SIM presence detection function.
See section 1.8.2 for functional description.
See section 2.5 for external circuit design-in.
UART
RXD
13
O
UART data output
Circuit 104 (RxD) in ITU-T V.24, for AT command, data,
Mux, and FOAT.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
TXD
12
I
UART data input
Circuit 103 (TxD) in ITU-T V.24, for AT command, data,
Mux, and FOAT.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
CTS
11
O
UART clear to send
output
Circuit 106 (CTS) in ITU-T V.24.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RTS
10
I
UART request to
send input
Circuit 105 (RTS) in ITU-T V.24.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DSR
6
O
UART data set
ready output
Circuit 107 (DSR) in ITU-T V.24.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DTR
9
I
UART data
terminal ready
input
Circuit 108/2 (DTR) in ITU-T V.24.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RI
7
O
UART ring
indicator output
Circuit 125 (RI) in ITU-T V.24.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DCD
8
O
UART data carrier
detect output
Circuit 109 (DCD) in ITU-T V.24.
It operates at V_INT voltage level.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.