SARA-G450 - System integration manual
UBX-18046432 - R08 Design-in Page 56 of 143
C1-Public
2 Design-in
2.1 Overview
For an optimal integration of SARA-G450 modules in the final application board, follow the design
guidelines stated in this section.
Every application circuit must be properly designed to guarantee the correct functionality of the
related interface, however a number of points require higher attention during the design of the
application device.
The following list provides a ranking of importance in the application design, starting from the highest
relevance:
1. Module antenna connection: ANT and ANT_DET pins. Antenna circuit directly affects the RF
compliance of the device integrating a SARA-G450 module with the applicable certification
schemes. Very carefully follow the suggestions provided in section 2.4 for schematic and layout
design.
2. Module supply: VCC and GND pins. The supply circuit affects the RF compliance of the device
integrating a SARA-G450 module with applicable certification schemes as well as antenna circuit
design. Very carefully follow the suggestions provided in section 2.2.1 for schematic and layout
design.
3. SIM interface: VSIM, SIM_CLK, SIM_IO, SIM_RST, SIM_DET pins. Accurate design is required to
guarantee SIM card functionality and compliance with applicable conformance standards,
reducing also the risk of RF coupling. Carefully follow the suggestions provided in section 2.5 for
schematic and layout design.
4. System functions: PWR_ON, PWR_OFF, VSEL pins. Accurate design is required to guarantee that
the voltage level is well defined during operation. Carefully follow the suggestions provided in
section 2.3 for schematic and layout design.
5. Analog audio interface: MIC_BIAS, MIC_GND, MIC_P, MIC_N uplink and SPK_P, SPK_N downlink
pins. Accurate design is required to obtain clear and high quality audio reducing the risk of noise
from audio lines due to both supply burst noise coupling and RF detection. Carefully follow the
suggestions provided in section 2.7 for schematic and layout design.
6. Other digital interfaces: primary main UART, secondary auxiliary UART and additional UART (for
FW upgrade and Tracing) interfaces, DDC I2C-compatible interface, and GPIOs. Accurate design
is required to guarantee proper functionality and reduce the risk of digital data frequency
harmonics coupling. Follow the suggestions provided in sections 2.6, 2.7 and 2.8 for schematic
and layout design.
7. Other supplies: the V_BCKP RTC supply input/output and the V_INT digital interfaces supply
output. Accurate design is required to guarantee correct functionality. Follow the suggestions
provided in sections 2.2.2 and 2.2.3 for schematic and layout design.
2.2 Supply interfaces
2.2.1 Module supply (VCC)
2.2.1.1 General guidelines for VCC supply circuit selection and design
All the available VCC pins must be connected to the external supply minimizing the power loss due to
series resistance.
GND pins are internally connected, but still connect all the available pins to a solid ground on the
application board, since a good (low impedance) connection to external ground can minimize power
loss and improve RF and thermal performance.
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