SARA-G450 - System integration manual
UBX-18046432 - R08 Design-in Page 73 of 143
C1-Public
2.3.1.2 Guidelines for PWR_ON layout design
The power-on circuit (PWR_ON) requires careful layout since it is the sensitive input available to
switch on the SARA-G450 modules from power-off mode until a valid VCC supply is provided: ensure
that the voltage level is well defined during operation and no transient noise is coupled on this line,
otherwise the module might detect a spurious power-on request.
2.3.2 Module hard power-off (PWR_OFF)
To perform a complete hardware reset, see section 1.6.3 for more details.
2.3.2.1 Guidelines for PWR_OFF circuit design
Connecting the PWR_OFF input to a push button that shorts the PWR_OFF pin to GND, the pin will
be externally accessible on the application device: according to EMC/ESD requirements of the
application, provide an additional ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) on the
line connected to this pin, close to accessible point, as described in Figure 34 and Table 23.
☞ ESD sensitivity rating of the PWR_OFF pin is 1 kV (HBM as per JESD22-A114). A higher protection
level can be required if the line is externally accessible on the application board, e.g. if an accessible
push button is directly connected to PWR_OFF pin. A higher protection level can be achieved by
mounting an ESD protection (e.g. EPCOS CA05P4S14THSG) close to accessible points.
Connecting the PWR_OFF input to an external device (e.g. application processor), use an open drain
output on the external device, as described in Figure 34.
A compatible push-pull output of an application processor can be used too.
The PWR_OFF input voltage thresholds are different from the other generic digital interfaces of the
module: see the SARA-G450 data sheet [1] for detailed electrical characteristics.
Take care to fix the correct level in all the possible scenarios to avoid an inappropriate module hard
power-off.
1:1 scaling
SARA-G450
18
PWR_OFF
Reset
push button
ESD
Open drain
output
Application
Processor
SARA-G450
18
PWR_OFF
TP
TP
Figure 34: PWR_OFF application circuits using a push button and an open drain output of an application processor
Part Number - Manufacturer
Varistor array for ESD protection
Table 23: Example of ESD protection for the PWR_OFF application circuit
☞ If the external hard power-off function is not required by the customer application, the PWR_OFF
pin can be left unconnected
☞ It is recommended to provide on the application board a directly accessible Test-Point connected
to the PWR_OFF pin for diagnostic purpose.
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