SARA-G450 - System integration manual
UBX-18046432 - R08 Appendix Page 137 of 143
C1-Public
The application processor controls the RESET_N / PWR_OFF line by means of open drain driver too.
The assertion or toggling of this line causes different actions:
the RESET_N line triggers an unconditional reboot of the module when toggled, without internal
PMU shutdown when set low, in case of SARA-N2, SARA-R5 and SARA-G3
the RESET_N line triggers an unconditional reboot of the module when toggled, with internal PMU
shutdown when set low, in case of SARA-N3 and SARA-U2
the RESET_N / PWR_OFF line triggers an unconditional shutdown of the module when set low or
toggled, in case of SARA-R41x and SARA-G4
The circuit need not be populated for SARA-R42x modules, not providing RESET_N / PWR_OFF input.
The timings for proper control of the PWR_ON / PWR_CTRL, RESET_N / PWR_OFF lines of the SARA
modules are reported in the related data sheet [1], [2], [3], [4], [5], [6], [7].
The ANT cellular antenna circuit is implemented in Figure 78 with also the optional ANT_DET antenna
detection circuit according to the design guidelines provided in the antenna interface sections of the
related system integration manual [8], [9], [10], [11].
While selecting the antenna for SARA cellular modules, consider the frequency range supported by
each SARA module, as illustrated in Figure 77.
Designers have to take care of the antenna from all perspective at the very start of the design phase,
when the physical dimensions of the application board are under analysis/decision, since the RF
compliance of the end-device integrating cellular modules with all the applicable required certification
schemes depending on the antenna’s radiating performance.
While implementing the RF antenna design for SARA cellular modules, consider providing the best
possible return loss in the frequency range supported by the modules, and place the antenna far from
VCC supply line and related parts, as well as far from any possible noise source.
The ANT_GNSS circuit is implemented in Figure 78 for SARA-R422M8S and SARA-R510M8S, with
also the optional external SAW and LNA for best performance and improved jamming immunity
The SIM interface circuit is implemented in Figure 78 with also the optional SIM detection function,
according to the design guidelines provided in SIM interface sections of the related system
integration manual [8], [9], [10], [11]: bypass capacitors with proper self-resonant frequency are
recommended to be placed close to the SIM connector, as well as ESD protections.
The GPIO1 that controls a LED as shown in Figure 78, to provide the network status indication, is
supported by all SARA modules except SARA-N2 series that can provide this function on the CTS pin.
Other functions can be enabled on the GPIOs of the SARA modules, as described in the related data
sheet [1], [2], [3], [4], [5], [6], [7], and related AT commands manual [12], [13], [14], [15].
Test-points for diagnostic or FW upgrade are provided as recommended in Figure 78 at these pins:
V_INT
PWR_ON / PWR_CTRL
RESET_N / PWR_OFF
GPIO1
VUSB_DET / USB_5V0
USB_3V3
USB_D+ / TXD_FT / TXD_AUX
USB_D- / RXD_FT / RXD_AUX
RSVD #33
All the GND pins are intended to be externally connected to ground, while other interfaces are not
implemented or not used in the simple example of design as shown in Figure 78.
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