Xilinx Zynq-7000 - Chapter 1: DDR3 and DDR2 SDRAM Memory Interface Solution; Introduction; Features

Chapter 2: ZC702 Evaluation Kit Built-In Self-Test
20 www.xilinx.com ZC702 and ZVIK Getting Started Guide
UG926 (v6.0) December 17, 2013
X-Ref Target - Fi gure 2-5
Figure 2-5: UART Port Setting Tab
UG926_c2_05_061212
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