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Xilinx Zynq-7000 Getting Started Guide

Xilinx Zynq-7000
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ZC702 and ZVIK Getting Started Guide www.xilinx.com 35
UG926 (v6.0) December 17, 2013
Running the Qt-Based GUI Application Demonstration
Video source control modes are explained as follows:
TPG interference
°
The input video is generated by the TPG IP implemented in the PL.
External video (available with the optional ZVIK FMC module)
°
The input video is supplied by an external video source and is connected through
the FMC-IMAGEON card.
Sobel filter modes are explained as follows:
Sobel OFF
No processing done. Sobel filter is bypassed.
Sobel – SW
Video processing (edge-detection filter) done by software code running on the PS.
Observe CPU utilization going up to 100% for one of the two CPUs (this can be seen in
the CPU usage graph). In this mode, the frame rate of the video also drops to about
3 fps to 10 fps depending upon resolution.
Sobel – HW
Video processing (edge-detection filtering) done by PL.
Observe CPU utilization going down (to approximately 0%) and the frame rate jumping
to 60 fps.
Figure 3-8 shows the detected image edges of the video generated by the TPG, that is, case
1 versus case 2 or 3 of Table 3- 1 .
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Xilinx Zynq-7000 Specifications

General IconGeneral
BrandXilinx
ModelZynq-7000
CategoryMotherboard
LanguageEnglish

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