Yamaha P-105B - μPD789022 GB-A15-8 E CPU Pins; WM8524 GEDT;R DAC LSI Pins

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μPD789022GB-A15-8E (XZ560100) CPU (MKS)
DM: IC7
P-105B/P-105WH
PIN
NO.
NAME I/O FUNCTION
1 P12 I/O
2 P11 I/O Port 1
3 P10 I/O
4 P47/KR7 I/O
5 P46/KR6 I/O
6 P45/KR5 I/O
7 P44/KR4 I/O
Port 4/Key return signal detection input
8 P43/KR3 I/O
9 P42/KR2 I/O
10 P41/KR1 I/O
11 P40/KR0 I/O
12 NC
13 IC Internally connected (N.C.)
14 X2
Clock
15 X1 I
16 VSS0 Ground
17 VDD0 Power supply
18 /RESET I System reset
19 P53 I/O
Port 5
20 P52 I/O
21 P51/TO2 I/O Port 5/16-bit timer output
22 P50/TI0/TO0 I/O Port 5/External count clock input to
8-bit timer/8-bit timer output
23 P32/INTP2/ I/O Port 3/External interrupt input/
CPT2 Capture edge input
PIN
NO.
NAME I/O FUNCTION
1 LINEVOUTL Analogue Out Left line output
2 CPVOUTN Analogue Out Charge Pump
negative rail decoupling pin
3 CPCB Analogue Out Charge Pump fly back capacitor pin
4 LINEGND Supply Charge Pump ground
5 CPCA Analogue Out Charge Pump fly back capacitor pin
6 LINEVDD Supply Charge Pump supply
7 DACDAT Digital In Digital audio interface data input
8 LRCLK Digital In Digital audio interface
left/right clock
9 BCLK Digital In Digital audio interface bit clock
PIN
NO.
NAME I/O FUNCTION
24 P31/INTP1 I/O
Port 3/External interrupt input
25 P30/INTP0 I/O
26 P22/RXD/SI0 I/O Port 2/Asynchronous serial interface serial
data input/Serial interface serial data input
27 P21/TXD/SO0 I/O Port 2/Asynchronous serial interface serial
data output/Serial interface serial data output
28 P20/ASCK// I/O Port 2/Asynchronous serial interface serial
SCK0 clock input/Serial interface serial clock
29 P07 I/O
30 P06 I/O
31 P05 I/O
32 P04 I/O
Port 0
33 P03 I/O
34 P02 I/O
35 P01 I/O
36 P00 I/O
37 NC
38 VDD1 Power supply
39 VSS1 Ground
40 P17 I/O
41 P16 I/O
42 P15 I/O Port 1
43 P14 I/O
44 P13 I/O
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WM8524GEDT/R (YC681B00) DAC
DM: IC23 [P-105B/P-105WH], IC301 [P-35B]
P-105B/P-105WH P-35B
PIN
NO.
NAME I/O FUNCTION
10 MCLK Digital In Master clock
11 MUTE Digital In 0 = Mute enabled
1 = Mute disabled
12 AIFMODE Digital In 0 = 24-bit Left Justified
Tri-level 1 = 24-bit I
2
S
Z = 24-bit Right Justified
13 AGND Supply Analogue ground
14 VMID Analogue Out Analogue midrail decoupling pin
15 AVDD Supply Analogue supply
16 LINEVOUTR Analogue Out Right line output
Note: Tri-level pins which require the ‘Z’ state to be selected should be left floating (open)
P-105B/P-105WH/P-35B/L-85WH/LP-5AWH
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