Zenith H-100 - Page 47

10-82
The status latch still can not be read until the status
port select line (STPS) is asserted at pin 15 of U31. This
line comes from U17-14, the I/O address decoder.
The I/O address decoder activates STPS by decoding the
address lines AO, A 1, and A2. If AO and A1 are low and
A2 is high, and if BDSEL or board select is active, then
U17's Y1 line goes low. This causes U31 to place the status
word onto the board's internal data bus, where it is
buffered by U36 to the S-100.bus.
The organization of the status latch is as follows:
BIT
SIGNAL NAME FUNCTION
0
INTRQ
o =
no interrupt
,
=
interrupt
request request
from
1797
1 MOTORON
(5 ")
0
=
spindle motor
1
=
spindle motor
not running
running
3
96TPl
o =
5.25" drives
1
=
5.25" drives
are 48 TPI are 96 TPl
4
PRECCl1P
o =
5.25" drives do
1
=
5.25" drives
not need precanp
need precomp
6 TWOS I DED
o =
8" diskette not
1
= 8" diskette
t~ sided t~ sided
7
DRQ
o = not ready for
1
=
ready for
data
data transfer
transfer
READ STATUS REGISTER OF 1797 (U22)
Assume now that the 1797' s status register is to be read.
The procedure is the same as described previously, except
that address lines AO, Al, and A2 are low. Because the
address bits AO-A2 are different, the I/O address decoder,
U17, does not enable the status latch, U31. Instead the
status register of the 1797 is selected and read onto the
data bus.
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