eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
100
AND A, (HL)
Logical AND
Operation
A ← A AND (HL)
Description
The (HL) operand is the 8-bit value stored at the memory location indicated by the con-
tents of the multibyte HL register. This 8-bit value is bitwise ANDed with the contents of
the accumulator, A. The result is stored in the accumulator.
Condition Bits Affected
Attributes
S Set if result is negative; reset otherwise.
Z Set if result is 0; reset otherwise.
H Set.
P/V Set if parity is even; reset otherwise.
N Reset.
C Reset.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
AND A,(HL) X 2 A6
AND.S A,(HL) 1 3 52, A6
AND.L A,(HL) 0 3 49, A6
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