ZiLOG eZ80 User Manual

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
138
DEC rr
Decrement
Operation
rr ← rr – 1
Description
The rr operand is any of the multibyte CPU registers BC, DE, or HL. The value contained
in the specified register is decremented by 1.
Condition Bits Affected
None.
Attributes
kk identifies the BC, DE, or HL register and is assembled into one of the opcodes indi-
cated in Table 53.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
DEC rr X1kk
DEC.S rr 1252, kk
DEC.L rr 0249, kk
Table 53. Register and kk Opcodes for DEC rr Instruction (hex)
Register kk
BC 0B
DE 1B
HL 2B

ZiLOG eZ80 Specifications

General

Brand	ZiLOG
Model	eZ80
Category	Computer Hardware
Language	English