ZiLOG eZ80 - Page 210

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
201
LD I, A
Load Interrupt Vector
Operation
I[7:0] ← A
Description
The CPU writes the contents of the accumulator, A, to the lower byte of the Interrupt Vec-
tor register, I[7:0].
Condition Bits Affected
None.
Attributes
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LD I,A X 2 ED, 47