eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
226
LD r, n
Load Register
Operation
r ← n
Description
The
r
operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The 8-bit immedi-
ate operand
n
is written to the specified
r
register.
Condition Bits Affected
None.
Attributes
jj identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
indicated in Table 69.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LD r,n X2jj, nn
Table 69. Register and jj Opcodes for LD r, n Instruction (hex)
Register jj
A 3E
B 06
C 0E
D 16
E 1E
H 26
L 2E
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