eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
238
LDD
Load and Decrement
Operation
(DE) ← (HL)
BC ← BC – 1
DE ← DE – 1
HL ← HL – 1
Description
The CPU writes the contents of the memory location with an address contained in the mul-
tibyte register HL to the memory location with the address contained in the multibyte reg-
ister DE. The BC, DE, and HL registers decrement.
Condition Bits Affected
Attributes
S Not affected.
Z Not affected.
H Reset.
P/V Reset if BC− 1 = 0; set otherwise.
N Reset.
C Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LDD —X 5ED, A8
LDD.S —1 652, ED, A8
LDD.L —0 649, ED, A8
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