eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
354
SRL r
Shift Right Logical
Operation
Description
The
r
operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The CPU manipu-
lates the contents of the
r
operand by shifting them right one bit position. The CPU next
copies the contents of bit 0 into the Carry Flag and resets bit 7.
Condition Bits Affected
Attributes
jj identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
indicated in Table 101.
S Set if result is negative; reset otherwise.
Z Set if result is 0; reset otherwise.
H Reset.
P/V Set if parity is even; reset otherwise.
N Reset.
C Data from bit 0 of the source.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
SRL r X2CB, jj
To Next Page
Loading...
Need help?
General
