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ABB RED670 - Forcing of Binary Input;Output Signals for Testing

ABB RED670
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Table 101. Number of INV instances
Logic block Quantity with cycle time
3 ms 8 ms 100 ms
INV 90 90 240
Table 102. Number of LLD instances
Logic block Quantity with cycle time
3 ms 8 ms 100 ms
LLD 10 10 20
Table 103. Number of OR instances
Logic block
Quantity with cycle time
3 ms 8 ms 100 ms
OR 69 60 160
Table 104. Number of PULSETIMER instances
Logic block
Quantity with cycle time Range or Value Accuracy
3 ms 8 ms 100 ms
PULSETIMER 10 10 20 (0.000–90000.000) s ±0.5% ±10 ms
Table 105. Number of RSMEMORY instances
Logic block
Quantity with cycle time
3 ms 8 ms 100 ms
RSMEMORY 10 10 20
Table 106. Number of SRMEMORY instances
Logic block
Quantity with cycle time
3 ms 8 ms 100 ms
SRMEMORY 10 10 20
Table 107. Number of TIMERSET instances
Logic block
Quantity with cycle time Range or Value Accuracy
3 ms 8 ms 100 ms
TIMERSET 15 15 30 (0.000–90000.000) s ±0.5% ±10 ms
Table 108. Number of XOR instances
Logic block
Quantity with cycle time
3 ms 8 ms 100 ms
XOR 10 10 20
1MRK 505 346-BEN -
Line differential protection RED670 2.1 IEC
Product version: 2.1
ABB 95

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