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Abit IP35-E - Fan Speed Monitoring

Abit IP35-E
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BIOS Setup
IP35/IP35-E 2-9
Full Screen LOGO Show
This item determines to show the full screen logo when booting.
Disable Unused PCI Clock
This option disables the clock of PCI slot that is not in use.
[Yes]: The system automatically detect the unused DIMM and PCI slots, and stop sending
clock signal to these unused PCI slots.
[No]: The system always send clock signal to all PCI slots.
Set this option to [No] setting if there are adapters that cannot be
automatically detected by the system and will cause malfunction.
2.4 Advanced Chipset Features
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing Selectable By SPD Item Help
x - CAS Latency Time (tCL) Auto
x - RAS# to CAS# Dealay (tRCD) Auto
x - RAS# Precharge (tRP) Auto
x - Precharge Delay (tRAS) Auto
x - Refresh Cycle Time (tRFC) Auto
x - Write Recovery Time (tWR) Auto
x - Write to Read Delay (tWTR) Auto
x - Act to Act Time (tRRD) Auto
x - Read to Precharge (tRTP) Auto
PCIe Root Port Function Press Enter
Init Display First PCI Slot
PEG Force X1 Disabled

:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
DRAM Timing Selectable
This item sets the optimal timings for the following four items, depending on the memory
module you are using. The default setting “By SPD” configures these four items by reading the
contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module
stores critical parameter information about the module, such as memory type, size, speed,
voltage interface, and module banks. The following items will be available to make adjustments
by selecting option [Manual].

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