Altera DE2 Board - IrDA Wireless Communication; SDRAM, SRAM, and Flash Memory; Software Installation Guide; Install Quartus II Software

Using the System
30
Figure 3.14 TV Decoder Circuits
Signal Name FPGA Pin No.
Description
TD_DATA[0] PIN_J9 TV Decoder Data[0]
TD_DATA[1] PIN_E8 TV Decoder Data[1]
TD_DATA[2] PIN_H8 TV Decoder Data[2]
TD_DATA[3] PIN_H10 TV Decoder Data[3]
TD_DATA[4] PIN_G9 TV Decoder Data[4]
TD_DATA[5] PIN_F9 TV Decoder Data[5]
TD_DATA[6] PIN_D7 TV Decoder Data[6]
TD_DATA[7] PIN_C7 TV Decoder Data[7]
TD_HS PIN_D5 TV Decoder H_SYNC
TD_VS PIN_K9 TV Decoder V_SYNC
TD_RESET PIN_C4 TV Decoder Reset
I2C_SCLK PIN_A6 I2C Data
I2C_SDAT PIN_B6 I2C Clock
Table 3.12 Pin Assignment for TV Decoder Circuits