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Altera DE2 Board - Page 47

Altera DE2 Board
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First Lab: DE2 Top-Level and Default Bitstream
44
Figure 5.1. Menu for Opening Quartus II Project
Select Quartus II project DE2_Default under C:\DE2\DE2_Default directory
Please refer to Figure 5.2. Click on File Icon in the bottom of left-hand side
window and select DE2_Default. Examine the file content and the IO port
declaration. You will find that we provide detailed descriptions for user to
understand the purpose of each pin in the top-level module.
DE2 Top-Level Pin Definition
module DE2_Default
(
//////////////////// Clock Input ////////////////////
CLOCK_27, // 27 MHz
CLOCK_50, // 50 MHz
EXT_CLOCK, // External Clock
//////////////////// Push Button ////////////////////
KEY, // Button[3:0]
//////////////////// DPDT Switch ////////////////////
SW, // DPDT Switch[17:0]
//////////////////// 7-SEG Display ////////////////////
HEX0, // Seven Segment Digital 0
HEX1, // Seven Segment Digital 1
HEX2, // Seven Segment Digital 2
HEX3, // Seven Segment Digital 3
HEX4, // Seven Segment Digital 4
HEX5, // Seven Segment Digital 5
HEX6, // Seven Segment Digital 6
HEX7, // Seven Segment Digital 7
//////////////////////// LED ////////////////////////
LEDG, // LED Green[8:0]
LEDR, // LED Red[17:0]
//////////////////////// UART ////////////////////////
UART_TXD, // UART Transmitter
UART_RXD, // UART Receiver
//////////////////////// IRDA ////////////////////////
IRDA_TXD, // IRDA Transmitter
IRDA_RXD, // IRDA Receiver
///////////////////// SDRAM Interface ////////////////

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