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Altera DE2 Board - Ethernet Lab Setup

Altera DE2 Board
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Lab 6: Ethernet Packet Sending/Receiving
63
Figure 10.1 Packet Sending and Receiving using NIOS II CPU
10-2
Lab Setup and Instructions
Project Directory: C:\DE2\UP4_NET
Bitstream Used: UP4_API.sof or UP4_API.pof
NIOSII Workspace: C:\DE2\UP4_NET
Refer to Figure 10.2 and setup the lab according to the following steps:
Plug in a CAT5 loopback cable into the Ethernet connector of DE2.
Load the bitstream into FPGA
Run NIOSII IDE under the workspace C:\DE2\UP4_NET
Click on “Compile and Run” button
Now you can observed the content of the packets received (64-byte packets
sent, 68-byte packets received because of the extra checksum bytes).

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