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APPOTECH CW6632B - Timer1; Timer1 Features

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7 Timers 63
CW6632B Bluetooth 3.0 Audio Player SOC Version 1.0.0
Copyright ©2015, www.appotech.com. All Rights Reserved.
100 = Timer0 counts at every 16 counting source events
101 = Timer0 counts at every 32 counting source events
110 = Timer0 counts at every 64 counting source events
111 = Timer0 counts at every 128 counting source events
Register 7-2 TMR0CNT Timer0 Counter
Position
7
6
5
4
3
2
1
0
Name
TMR0CNT
Default
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Note: Timer0 will increase in proper condition while it is enabled. It overflows when TMR0CNT = TMR0PR,
TMR0CNT will be clear to 0x00 when overflow occurs, and the interrupt flag will be set „1‟ by hardware.
Register 7-3 TMR0PR Timer0 Period
Position
7
6
5
4
3
2
1
0
Name
TMR0PR
Default
1
1
1
1
1
1
1
1
Access
WO
WO
WO
WO
WO
WO
WO
WO
Note: The overflow period of the timer is: T
inc-source
* T0PSR * (T0PR + 1).
Register 7-4 TMR0PWM Timer0 PWM duty
Position
7
6
5
4
3
2
1
0
Name
TMR0PWM
Default
x
x
x
x
x
x
x
x
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Note: TMR0PWM is reserved in timer/counter mode. In PWM mode, it is used as duty cycle setting. In capture
mode, the value of TMR0CNT will be captured to TMR0PWM when selected event occurs.
7.2 Timer1
Timer1 is a 16-bit timer/counter with a 7-bit prescaler. It can be configured as timer, counter or PWM generator. X
7.2.1 Timer1 Features
16bits counter
7bits pre-scaler
Counter mode (clock source from system clock or TMR1)
Capture mode (event source from CAP1)
PWM mode (PWM signal output to PWM1)

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