21
AT90S/LS2323/2343
1004D–09/01
Note: 1. The Power-on Reset will not work unless the supply voltage has been below V
POT
(falling).
Note: 1. The Power-on Reset will not work unless the supply voltage has been below V
POT
(falling).
Power-on Reset The AT90S2323/2343 is designed for use in systems where it can operate from the
internal RC oscillator (AT90S/LS2343), on-chip oscillator (AT90S/LS2323), or in appli-
cations where a clock signal is provided by an external clock source. After V
CC
has
reached V
POT
, the device will start after the time t
TOUT
(see Figure 25). If the clock signal
is provided by an external clock source, the clock must not be applied until V
CC
has
reached the minimum voltage defined for the applied frequency.
For AT90S2323, the user can select the start-up time according to typical oscillator
start-up. The number of WDT oscillator cycles used for each time-out is shown in
Table 6. For AT90S2343, the start-up time is one Watchdog cycle only. The frequency
of the Watchdog oscillator is voltage-dependent as shown in “Typical Characteristics” on
page 49.
Table 4. Reset Characteristics (V
CC
= 5.0V)
Symbol Parameter Min Typ Max Units
V
POT
(1)
Power-on Reset Threshold Voltage, rising 1.0 1.4 1.8 V
Power-on Reset Threshold Voltage, falling 0.4 0.6 0.8 V
V
RST
RESET Pin Threshold Voltage 0.6 V
CC
V
t
TOUT
Reset Delay Time-out Period AT90S/LS2323
FSTRT Programmed
1.0 1.1 1.2 ms
t
TOUT
Reset Delay Time-out Period AT90S/LS2323
FSTRT Unprogrammed
11.0 16.0 21.0 ms
t
TOUT
Reset Delay Time-out Period AT90S/LS2343 11.0 16.0 21.0 µs
Table 5. Reset Characteristics (V
CC
= 3.0V)
Symbol Parameter Min Typ Max Units
V
POT
(1)
Power-on Reset Threshold Voltage, rising 1.0 1.4 1.8 V
Power-on Reset Threshold Voltage, falling 0.4 0.6 0.8 V
V
RST
RESET Pin Threshold Voltage 0.6 V
CC
V
t
TOUT
Reset Delay Time-out Period AT90S/LS2323
FSTRT Programmed
2.0 2.2 2.4 ms
t
TOUT
Reset Delay Time-out Period AT90S/LS2323
FSTRT Unprogrammed
22.0 32.0 42.0 ms
t
TOUT
Reset Delay Time-out Period AT90S/LS2343 22.0 32.0 42.0 µs
Table 6. Number of Watchdog Oscillator Cycles
FSTRT Time-out at V
CC
= 5V Number of WDT Cycles
Programmed 1.1 ms 1K
Unprogrammed 16.0 ms 16K